作者
John H Lau, Ming Li, Margie Li Qingqian, Tony Chen, Iris Xu, Qing Xiang Yong, Zhong Cheng, Nelson Fan, Eric Kuah, Zhang Li, Kim Hwee Tan, Yiu-Ming Cheung, Eric Ng, Penny Lo, Wu Kai, Ji Hao, Koh Sau Wee, Jiang Ran, Cao Xi, Rozalia Beica, Sze Pei Lim, NC Lee, Cheng-Ta Ko, Henry Yang, Yu-Hua Chen, Mian Tao, Jeffery Lo, Ricky SW Lee
发表日期
2018/7/12
期刊
IEEE Transactions on Components, Packaging and Manufacturing Technology
卷号
8
期号
9
页码范围
1544-1560
出版商
IEEE
简介
The design, materials, process, fabrication, and reliability of a heterogeneous integration of four chips and four capacitors by a fan-out wafer-level packaging (FOWLP) method are investigated in this paper. Emphasis is placed on the application of a new assembly process for fabricating the redistribution layers of the FOWLP. Reliability assessments, such as the thermal cycling and drop test, are also performed.
学术搜索中的文章
JH Lau, M Li, ML Qingqian, T Chen, I Xu, QX Yong… - IEEE Transactions on Components, Packaging and …, 2018