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Scenarios are powerful tools to model and analyze software systems. However, since they do not provide a complete description of the system, but just some possible execution paths, they are usually integrated with state machines. State machines may be extracted from scenarios using a synthesis process. We could expect that the synthesized state machine model is “equivalent” to the original scenario specification. Instead, it has been proven that it does not always hold, and state machines may introduce unexpected behaviors, called implied scenarios. This paper proves that there is a strict correlation between implied scenarios and non-local branching choices. Based on this result, we propose an approach to identify implied scenarios in High-Level Message Sequence Chart specifications and its application to some specifications. We finally highlight advantages with respect to existent approaches.