作者
Dimitrios M Schinianakis, Apostolos P Fournaris, Harris E Michail, Athanasios P Kakarountas, Thanos Stouraitis
发表日期
2008/10/31
期刊
IEEE Transactions on Circuits and Systems I: Regular Papers
卷号
56
期号
6
页码范围
1202-1213
出版商
IEEE
简介
Elliptic curve point multiplication is considered to be the most significant operation in all elliptic curve cryptography systems, as it forms the basis of the elliptic curve discrete logarithm problem. Designs for elliptic curve cryptography point multiplication are area demanding and time consuming. Thus, the efficient realization of point multiplication is of fundamental importance for the performance of an elliptic curve system. In this paper, a hardware architecture of an elliptic curve point multiplier is proposed that exploits the intrinsic parallelism of the residue number system (RNS), in order to speed up the elliptic curve point calculations and minimize the area complexity of the elliptic curve point multiplier. The architecture proves to be the fastest among all known design approaches, while complexity is less than half of that of previous efforts. This architecture also supports the required input (binary-to-RNS) and output …
引用总数
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DM Schinianakis, AP Fournaris, HE Michail… - IEEE Transactions on Circuits and Systems I: Regular …, 2008