Obfuscating the interconnects: Low-cost and resilient full-chip layout camouflaging S Patnaik, M Ashraf, J Knechtel, O Sinanoglu 2017 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 41-48, 2017 | 67 | 2017 |
Advancing hardware security using polymorphic and stochastic spin-hall effect devices S Patnaik, N Rangarajan, J Knechtel, O Sinanoglu, S Rakheja 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE), 97-102, 2018 | 62 | 2018 |
Large-scale 3D chips: Challenges and solutions for design automation, testing, and trustworthy integration J Knechtel, O Sinanoglu, IAM Elfadel, J Lienig, CCN Sze IPSJ Transactions on System and LSI Design Methodology 10, 45-62, 2017 | 56 | 2017 |
Assembling 2D blocks into 3D chips J Knechtel, IL Markov, J Lienig Proceedings of the 2011 international symposium on Physical design, 81-88, 2011 | 53 | 2011 |
GNN-RE: Graph Neural Networks for Reverse Engineering of Gate-Level Netlists L Alrahis, A Sengupta, J Knechtel, S Patnaik, H Saleh, B Mohammad, ... IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2021 | 48 | 2021 |
Hardware Security for and beyond CMOS Technology J Knechtel Proceedings of the 2021 International Symposium on Physical Design, 115-126, 2021 | 45* | 2021 |
Opening the doors to dynamic camouflaging: Harnessing the power of polymorphic devices N Rangarajan, S Patnaik, J Knechtel, R Karri, O Sinanoglu, S Rakheja IEEE Transactions on Emerging Topics in Computing, 2020 | 42 | 2020 |
Concerted wire lifting: Enabling secure and cost-effective split manufacturing S Patnaik, M Ashraf, H Li, J Knechtel, O Sinanoglu IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2021 | 41 | 2021 |
Rethinking split manufacturing: An information-theoretic approach with secure layout techniques A Sengupta, S Patnaik, J Knechtel, M Ashraf, S Garg, O Sinanoglu 2017 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 329-326, 2017 | 37 | 2017 |
UNSAIL: Thwarting Oracle-Less Machine Learning Attacks on Logic Locking L Alrahis, S Patnaik, J Knechtel, H Saleh, B Mohammad, M Al-Qutayri, ... IEEE Transactions on Information Forensics and Security 16, 2508-2523, 2021 | 36 | 2021 |
Towards secure composition of integrated circuits and electronic systems: On the role of EDA J Knechtel, EB Kavun, F Regazzoni, A Heuser, A Chattopadhyay, ... DATE, 2020 | 36 | 2020 |
Planning Massive Interconnects in 3D Chips J Knechtel, E Young, J Lienig Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions …, 2015 | 36 | 2015 |
Protect your chip design intellectual property: An overview J Knechtel, S Patnaik, O Sinanoglu Proceedings of the International Conference on Omni-Layer Intelligent …, 2019 | 34 | 2019 |
DNA-assisted oligomerization of pore-forming toxin monomers into precisely-controlled protein channels A Henning-Knechtel, J Knechtel, M Magzoub Nucleic acids research 45 (21), 12057-12068, 2017 | 34 | 2017 |
2.5 D root of trust: Secure system-level integration of untrusted chiplets M Nabeel, M Ashraf, S Patnaik, V Soteriou, O Sinanoglu, J Knechtel IEEE Transactions on Computers 69 (11), 1611-1625, 2020 | 32 | 2020 |
Raise your game for split manufacturing: Restoring the true functionality through BEOL S Patnaik, M Ashraf, J Knechtel, O Sinanoglu Proceedings of the 55th Annual Design Automation Conference, 1-6, 2018 | 31 | 2018 |
Security promises and vulnerabilities in emerging reconfigurable nanotechnology-based circuits S Rai, S Patnaik, A Rupani, J Knechtel, O Sinanoglu, A Kumar IEEE Transactions on Emerging Topics in Computing 10 (2), 763-778, 2020 | 29 | 2020 |
A modern approach to IP protection and trojan prevention: Split manufacturing for 3D ICs and obfuscation of vertical interconnects S Patnaik, M Ashraf, O Sinanoglu, J Knechtel IEEE Transactions on Emerging Topics in Computing 9 (4), 1815-1834, 2019 | 27 | 2019 |
Attacking split manufacturing from a deep learning perspective H Li, S Patnaik, A Sengupta, H Yang, J Knechtel, B Yu, EFY Young, ... Proceedings of the 56th Annual Design Automation Conference 2019, 1-6, 2019 | 27 | 2019 |
On mitigation of side-channel attacks in 3D ICs: Decorrelating thermal patterns from power and activity J Knechtel, O Sinanoglu Proceedings of the 54th Annual Design Automation Conference 2017, 1-6, 2017 | 26 | 2017 |