| A high-throughput reconfigurable processing array for neural networks E Wu, X Zhang, D Berman, I Cho 2017 27th International Conference on Field Programmable Logic and …, 2017 | 42 | 2017 |
| Compute-efficient neural-network acceleration E Wu, X Zhang, D Berman, I Cho, J Thendean Proceedings of the 2019 ACM/SIGDA International Symposium on Field …, 2019 | 33 | 2019 |
| The DSPCAD lightweight dataflow environment: Introduction to LIDE version 0.1 C Shen, L Wang, I Cho, S Kim, S Won, W Plishker, SS Bhattacharyya Institute for Advanced Computer Studies, University of Maryland at College …, 2011 | 28 | 2011 |
| Model based design environment for data-driven embedded signal processing systems K Sudusinghe, I Cho, M Van Der Schaar, SS Bhattacharyya Procedia Computer Science 29, 1193-1202, 2014 | 18 | 2014 |
| Pipelined FFT for wireless communications supporting 128–2048/1536-point transforms I Cho, T Patyk, D Guevorkian, J Takala, S Bhattacharyya 2013 IEEE Global Conference on Signal and Information Processing, 1242-1245, 2013 | 18 | 2013 |
| Efficient architecture mapping of FFT/IFFT for cognitive radio networks G Wang, B Yin, I Cho, JR Cavallaro, S Bhattacharyya, J Takala 2014 IEEE International Conference on Acoustics, Speech and Signal …, 2014 | 15 | 2014 |
| Configurable, resource-optimized FFT architecture for OFDM communication I Cho, CC Shen, Y Tachwali, CJ Hsu, SS Bhattacharyya 2013 IEEE International Conference on Acoustics, Speech and Signal …, 2013 | 8 | 2013 |
| Enhanced response algorithm for spurious TCP timeout (ER-SRTO) I Cho, J Han, J Lee 2008 International Conference on Information Networking, 1-5, 2008 | 8 | 2008 |
| Design methods for wireless sensor network building energy monitoring systems I Cho, CC Shen, S Potbhare, SS Bhattacharyya, N Goldsman 2011 IEEE 36th Conference on Local Computer Networks, 974-981, 2011 | 7 | 2011 |
| Physical Design Space Exploration E Wu, I Cho Proceedings of the 2015 ACM/SIGDA International Symposium on Field …, 2015 | | 2015 |
| Hardware and software architectures for energy-and resource-efficient signal processing systems I Cho University of Maryland, College Park, 2014 | | 2014 |
| A system-level design approach for dynamic resource coordination and energy optimization in sensor network platforms I Cho, K Sudusinghe, CC Shen, J McGee, S Bhattacharyya 2013 Asilomar Conference on Signals, Systems and Computers, 1436-1441, 2013 | | 2013 |
