| Weather forecasting using machine learning algorithm N Singh, S Chaturvedi, S Akhter 2019 International Conference on Signal Processing and Communication (ICSC …, 2019 | 122 | 2019 |
| VHDL implementation of fast NxN multiplier based on vedic mathematic S Akhter 2007 18th European Conference on Circuit Theory and Design, 472-475, 2007 | 111 | 2007 |
| Modified binary multiplier circuit based on Vedic mathematics S Akhter, S Chaturvedi 2019 6th international conference on signal processing and integrated …, 2019 | 35 | 2019 |
| CMOS Implementation of Efficient 16-Bit Square Root Carry-Select Adder S Akhter, S Chaturvedi, K Pardhasardi Signal Processing and Integrated Networks (SPIN), 2015 2nd International …, 2015 | 20 | 2015 |
| Analysis of Vedic multiplier using various adder topologies S Akhter, V Saini, J Saini 2017 4th International Conference on Signal Processing and Integrated …, 2017 | 18 | 2017 |
| An efficient CMOS dynamic logic-based full adder S Akhter, S Chaturvedi, S Khan, A Bhardwaj 2020 6th International Conference on Signal Processing and Communication …, 2020 | 14 | 2020 |
| Design and Analysis of Distributed Arithmetic based FIR Filter Shamim Akhter,Divya Bareja,Satyendra Kumar International Conference on Advances in Computing, Communication Control and …, 2018 | 13 | 2018 |
| Implementation, test pattern generation, and comparative analysis of different adder circuits VK Saini, S Akhter, T Chauhan VLSI Design 2016 (1), 1260879, 2016 | 13 | 2016 |
| HDL based implementation of N× N bit-serial multiplier S Akhter, S Chaturvedi 2014 International Conference on Signal Processing and Integrated Networks …, 2014 | 12 | 2014 |
| Implementation of an efficient N× N multiplier based on Vedic mathematics and Booth-Wallace tree multiplier A Jain, S Bansal, S Khan, S Akhter, S Chaturvedi 2019 international conference on power electronics, control and automation …, 2019 | 11 | 2019 |
| Detection and classification of brain tumor using support vector machine based GUI IU Khan, S Akhter, S Khan 2020 7th International conference on signal processing and integrated …, 2020 | 10 | 2020 |
| VHDL implementation of fast multiplier based on Vedic mathematic using modified square root carry select adder H Goyal, S Akhter International Journal of Computer Applications 127 (2), 24-27, 2015 | 10 | 2015 |
| Vedic-based squaring circuit using parallel prefix adders A Jain, S Bansal, S Akhter, S Khan 2020 7th international conference on signal processing and integrated …, 2020 | 9 | 2020 |
| Analysis and design of residue number system based building blocks S Akhter, G Raturi, S Khan 2018 5th International Conference on Signal Processing and Integrated …, 2018 | 7 | 2018 |
| A distinctive approach for vedic-based squaring circuit S Akhter, S Chaturvedi, S Khan 2020 7th International Conference on Signal Processing and Integrated …, 2020 | 6 | 2020 |
| A Perspective View of Silicon Based Classical to Non-Classical MOS Transistors and their Extension in Machine Learning AP Singh, VK Mishra, S Akhter Silicon 15 (16), 6763-6784, 2023 | 5 | 2023 |
| Improved algorithm for ODCT computation of a running data sequence S Akhter, V Karwal, RC Jain Journal of Electrical and Computer Engineering 2012 (1), 879626, 2012 | 5 | 2012 |
| An efficient model to decipher the electroencephalogram signals using machine learning approach N Gupta, S Gupta, V Khare, CK Jain, S Akhter 4th Kuala Lumpur International Conference on Biomedical Engineering 2008 …, 2008 | 5 | 2008 |
| Multi feedback LFSR based watermarking of FSM A Bhardwaj, S Akhter 2021 7th International Conference on Signal Processing and Communication …, 2021 | 4 | 2021 |
| Analysis and Identification of Parkinson disease based on fMRI A Singh, N Mehra, S Singh, S Akther, C Jain, V Khare Int. J. Electron. Electr. Comput. Syst. IJEECS 6 (1), 201-205, 2017 | 3 | 2017 |
