| Optimized Fault-Tolerant Buffer Design for Network-on-Chip Applications AC Pinheiro, JAN Silveira, DAB Tavares, FGA Silva, CAM Marcon 2019 IEEE 10th Latin American Symposium on Circuits & Systems (LASCAS), 217-220, 2019 | 7 | 2019 |
| Analysis of routing algorithms generation for irregular noc topologies R Milfont, P Cortez, A Pinheiro, J Ferreira, J Silveira, R Mota, C Marcon 2017 18th IEEE Latin American Test Symposium (LATS), 1-5, 2017 | 6 | 2017 |
| A Triple Burst Error Correction Based on Region Selection Code F Silva, A Pinheiro, JAN Silveira, C Marcon IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2023 | 4 | 2023 |
| Optimized buffer protection for network-on-chip based on Error Correction Code A Pinheiro, D Tavares, F Silva, J Silveira, C Marcon Microelectronics Journal 100, 104799, 2020 | 4 | 2020 |
| A fault prediction module for a fault tolerant NoC operation J Silveira, M Bodin, JM Ferreira, AC Pinheiro, T Webber, C Marcon Sixteenth International Symposium on Quality Electronic Design, 284-288, 2015 | 4 | 2015 |
| Smart reconfiguration approach for fault-tolerant NoC based MPSoCs J Silveira, P Cortez, A Cadore, R Mota, C Marcon, L Brahm, R Fernandes Proceedings of the 28th Symposium on Integrated Circuits and Systems Design, 1-6, 2015 | 3 | 2015 |
| Accurate Model for Network-on-Chip Performance Evaluation Based on Timed Colored Petri Net J Silveira, A Cadore, GC Barroso, CAM Marcon, TCW Dos Santos, ... JICS. Journal of Integrated Circuits and Systems (Ed. Português), 2016 | | 2016 |
