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Dr. Yun Seop Yu
标题
引用次数
引用次数
年份
Macromodeling of single-electron transistors for efficient circuit simulation
YS Yu, SW Hwang, D Ahn
IEEE transactions on electron devices 46 (8), 1667-1671, 1999
1401999
Fall‐Detection Algorithm Using 3‐Axis Acceleration: Combination with Simple Threshold and Hidden Markov Model
D Lim, C Park, NH Kim, SH Kim, YS Yu
Journal of Applied Mathematics 2014 (1), 896030, 2014
1082014
Design challenges and solutions for ultra-high-density monolithic 3D ICs
S Panth, S Samal, YS Yu, SK Lim
2014 SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S …, 2014
532014
Impact of quantum confinement on band-to-band tunneling of line-tunneling type L-shaped tunnel field-effect transistor
F Najam, YS Yu
IEEE Transactions on Electron Devices 66 (4), 2010-2016, 2019
372019
Analytical threshold voltage model including effective conducting path effect (ECPE) for surrounding-gate MOSFETs (SGMOSFETs) with localized charges
YS Yu, N Cho, SW Hwang, D Ahn
IEEE transactions on electron devices 57 (11), 3176-3180, 2010
342010
SPICE macro-modeling for the compact simulation of single electron circuits
YS Yu, HS Lee, SW Hwang
JOURNAL-KOREAN PHYSICAL SOCIETY 33, S269-S272, 1998
341998
One electron-based smallest flexible logic cell
SJ Kim, JJ Lee, HJ Kang, JB Choi, YS Yu, Y Takahashi, DG Hasko
applied physics letters 101 (18), 2012
322012
A unified analytical current model for N-and P-type accumulation-mode (junctionless) surrounding-gate nanowire FETs
YS Yu
IEEE Transactions on Electron Devices 61 (8), 3007-3010, 2014
312014
Single-Electron-Based Flexible Multivalued Exclusive-or Logic Gate
SJ Kim, CK Lee, RS Chung, ES Park, SJ Shin, JB Choi, YS Yu, NS Kim, ...
IEEE transactions on electron devices 56 (5), 1048-1055, 2009
292009
A SPICE-compatible new silicon nanowire field-effect transistors (SNWFETs) model
SH Lee, YS Yu, SW Hwang, D Ahn
IEEE transactions on nanotechnology 8 (5), 643-649, 2009
292009
Transient modelling of single-electron transistors for efficient circuit simulation by SPICE
YS Yu, SW Hwang, D Ahn
IEE Proceedings-Circuits, Devices and Systems 152 (6), 691-696, 2005
292005
Simulation of single-electron/CMOS hybrid circuits using SPICE macro-modeling
YS Yu, YI Jung, JH Park, SW Hwang, D Ahn
Journal of the Korean Physical Society 35 (SUPPL. 4), S991-S994, 1999
291999
Electrical coupling of monolithic 3-D inverters
YS Yu, S Panth, SK Lim
IEEE Transactions on Electron Devices 63 (8), 3346-3349, 2016
282016
Implementation of single electron circuit simulation by SPICE: KOSEC-SPICE
YS Yu, JH Oh, SW Hwang
電子情報通信学会技術研究報告= IEICE technical report: 信学技報 100 (147), 85-90, 2000
282000
Subthreshold degradation of gate-all-around silicon nanowire field-effect transistors: Effect of interface trap charge
BH Hong, N Cho, SJ Lee, YS Yu, L Choi, YC Jung, KH Cho, KH Yeo, ...
IEEE electron device letters 32 (9), 1179-1181, 2011
242011
Gate-controlled MoTe2 homojunction for sub-thermionic subthreshold swing tunnel field-effect transistor
NT Duong, C Park, DH Nguyen, PH Nguyen, TU Tran, DY Park, J Lee, ...
Nano Today 40, 101263, 2021
232021
Interface trap density of gate-all-around silicon nanowire field-effect transistors with TiN gate: Extraction and compact model
F Najam, YS Yu, KH Cho, KH Yeo, DW Kim, JS Hwang, S Kim, SW Hwang
IEEE transactions on electron devices 60 (8), 2457-2463, 2013
232013
All-analytic surface potential model for SOI MOSFETs
YS Yu, SH Kim, SW Hwang, D Ahn
IEE Proceedings-Circuits, Devices and Systems 152 (2), 183-188, 2005
232005
Equivalent circuit approach for single electron transistor model for efficient circuit simulation by SPICE
YS Yu, JH Oh, SW Hwang, D Ahn
Electronics Letters 38 (16), 1, 2002
192002
Two-dimensional (2D) transition metal dichalcogenide semiconductor field-effect transistors: the interface trap density extraction and compact model
F Najam, MLP Tan, R Ismail, YS Yu
Semiconductor Science and Technology 30 (7), 075010, 2015
172015
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