| Energy efficient counter design using voltage scaling on FPGA T Gupta, G Verma, A Kaur, B Pandey, A Singh, T Kaur 2015 Fifth International Conference on Communication Systems and Network …, 2015 | 22 | 2015 |
| Area & power optimization of VPB peripheral memory for ARM7TDMI based microcontrollers T Gupta, G Verma 2015 International Conference on Cognitive Computing and Information …, 2015 | 20 | 2015 |
| A portable & cost effective human computer interface device for disabled T Gupta, H Verma, G Verma, L Sahoo 2015 Fifth International Conference on Communication Systems and Network …, 2015 | 13 | 2015 |
| Ground improvement using chemical methods: A review. Heliyon, 7 (7), e07678 H Verma, A Ray, R Rai, T Gupta, N Mehta | 6 | 2021 |
| GSM Based Design and Development of Smart Energy Meter Using EEPROM, LCD, and Microcontroller VK Tukur Gupta, P Pandey, G Verma Gyancity Journal of Electronics and Computer Science 2 (1), 49-57, 2017 | 5 | 2017 |
| Ground improvement using chemical methods: a review. Heliyon. 2021 H Verma, A Ray, R Rai, T Gupta, N Mehta | 5 | |
| Area & power modeling for different tree topologies of parallel prefix adders T Gupta, G Verma, S Akhter Engineering Research Express 5 (3), 035008, 2023 | 3 | 2023 |
| Design and Implementation of Area-Power Efficient Generic Modular Adder using Flagged Prefix Addition Approach T Gupta, S Akhter 2021 7th International Conference on Signal Processing and Communication …, 2021 | 3 | 2021 |
| HDL Implementation of five moduli residue number system T Gupta, S Akhter, A Srivastava, S Chaturvedi International Journal of Innovative Technology and Exploring Engineering …, 2019 | 2 | 2019 |
| RFID Based System for Effortless Shopping and Fast Billing in Supermarket M Aggarwal, T Gupta, G Verma 2022 2nd International Conference on Innovative Sustainable Computational …, 2022 | 1 | 2022 |
| IP-Based Design and Analysis of Parallel Prefix Adder for FPGAs T Gupta, G Verma, S Akhter National Academy Science Letters, 1-5, 2024 | | 2024 |
| FPGA Implementation and Performance Analysis of Parallel Prefix Structures for Modular Adders Design T Gupta, G Verma, S Akhter Circuits, Systems, and Signal Processing, 1-25, 2024 | | 2024 |
| Oorja: Real-Time Sustainable Power Monitoring System N Joshi, T Gupta 2024 International Conference on Electrical Electronics and Computing …, 2024 | | 2024 |
| Area and Power Modeling of Mod () Adder Structure for 6-Input Lookup Table Based FPGAs T Gupta, G Verma, S Akhter National Academy Science Letters, 1-5, 2024 | | 2024 |
| Performance Analysis of a Generic Modular Adder via RTL Programming and IP Modeling Techniques on FPGA. T Gupta, G Verma, S Akhter Ingénierie des Systèmes d'Information 28 (5), 2023 | | 2023 |
