| A low-spurious low-power 12-bit 160-MS/s DAC in 90-nm CMOS for baseband wireless transmitter D Seo, GH McAllister IEEE journal of solid-state circuits 42 (3), 486-495, 2007 | 48 | 2007 |
| High performance mobile SoC design and technology co-optimization to mitigate high-K metal gate process induced variations S Yang, L Ge, J Lin, M Han, D Yang, J Wang, K Mahmood, T Song, ... 2014 Symposium on VLSI Technology (VLSI-Technology): Digest of Technical …, 2014 | 28 | 2014 |
| High-voltage-tolerant analog circuits design in deep-submicrometer CMOS technologies D Seo, H Dabag, Y Guo, M Mishra, GH McAllister IEEE Transactions on Circuits and Systems I: Regular Papers 54 (10), 2159-2166, 2007 | 25 | 2007 |
| A heterogeneous 16-bit DAC using a replica compensation D Seo IEEE Transactions on Circuits and Systems I: Regular Papers 55 (6), 1455-1463, 2008 | 20 | 2008 |
| Hybrid R-2R structure for low glitch noise segmented DAC SM Lee, D Seo US Patent 9,178,524, 2015 | 18 | 2015 |
| High-speed and high-accuracy digital-to-analog converter D Seo US Patent 7,227,483, 2007 | 16 | 2007 |
| A 14 bit, 1 GS/s digital-to-analog converter with improved dynamic performances D Seo, A Weil, M Feng 2000 IEEE International Symposium on Circuits and Systems (ISCAS) 5, 541-544, 2000 | 13 | 2000 |
| A 14b 750MS/s DAC in 20nm CMOS with<-168dBm/Hz noise floor beyond Nyquist and 79dBc SFDR utilizing a low glitch-noise hybrid R-2R architecture SM Lee, D Seo, SM Taleie, D Kong, MJ McGowan, T Song, G Saripalli, ... 2015 Symposium on VLSI Circuits (VLSI Circuits), C164-C165, 2015 | 12 | 2015 |
| Current controlled oscillator with regulated symmetric loads D Seo, S Wadhwa US Patent 7,948,330, 2011 | 11 | 2011 |
| Apparatus and method for dynamic circuit element selection in an digital-to-analog converter D Seo, GH McAllister, HT Dabag US Patent 7,868,806, 2011 | 11 | 2011 |
| Pseudo-differential class-AB digital-to-analog converter with code dependent DC current D Seo, B Sun, GS Sahota, M Mishra US Patent 7,456,773, 2008 | 11 | 2008 |
| A very wide-band 14 bit, 1 GS/s track-and-hold amplifier D Seo, A Weil, M Feng 2000 IEEE International Symposium on Circuits and Systems (ISCAS) 5, 549-552, 2000 | 11 | 2000 |
| Current removal for digital-to-analog converters W Guo, SM Lee, B Sedighi, D Seo US Patent 9,819,357, 2017 | 9 | 2017 |
| Circuit and method for dynamically selecting circuit elements HT Dabag, D Seo, GH McAllister US Patent 8,094,052, 2012 | 9 | 2012 |
| A pseudodifferential class AB DAC for low-power wireless transmitter D Seo, M Mishra, B Sun, GH McAllister IEEE Transactions on Circuits and Systems I: Regular Papers 56 (10), 2332-2340, 2009 | 9 | 2009 |
| Apparatus and method for measuring current source mismatches in current-steering DAC by re-using R2R network E Sung, N Saputra, B Sedighi, A Swaminathan, H Ji, SM Taleie, D Seo US Patent 10,797,720, 2020 | 7 | 2020 |
| Digital calibration of transmit digital to analog converter full scale current GRM Saripalli, SM Taleie, MJ McGowan, J Kuo, D Seo, JA Elhusseini US Patent 9,337,855, 2016 | 7 | 2016 |
| Load detecting impedance matching buffer L Chiaburu, SM Taleie, D Seo, RB Silverstein US Patent 8,610,456, 2013 | 7 | 2013 |
| Voltage-to-current converter L Du, SM Lee, D Seo US Patent 9,608,586, 2017 | 6 | 2017 |
| Wideband digital to analog converter with built-in load attenuator D Seo, GR Saripalli, T Song, SM Taleie, D Kong US Patent 8,169,353, 2012 | 6 | 2012 |
