| Design and management of 3D chip multiprocessors using network-in-memory F Li, C Nicopoulos, T Richardson, Y Xie, V Narayanan, M Kandemir ACM SIGARCH Computer Architecture News 34 (2), 130-141, 2006 | 548 | 2006 |
| ViChaR: A dynamic virtual channel regulator for network-on-chip routers CA Nicopoulos, D Park, J Kim, N Vijaykrishnan, MS Yousif, CR Das 2006 39th Annual IEEE/ACM International Symposium on Microarchitecture …, 2006 | 426 | 2006 |
| A novel dimensionally-decomposed router for on-chip communication in 3D architectures J Kim, C Nicopoulos, D Park, R Das, Y Xie, V Narayanan, MS Yousif, ... ACM SIGARCH Computer Architecture News 35 (2), 138-149, 2007 | 361 | 2007 |
| Exploring fault-tolerant network-on-chip architectures D Park, C Nicopoulos, J Kim, N Vijaykrishnan, CR Das International Conference on Dependable Systems and Networks (DSN'06), 93-104, 2006 | 318 | 2006 |
| A gracefully degrading and energy-efficient modular router architecture for on-chip networks J Kim, C Nicopoulos, D Park, V Narayanan, MS Yousif, CR Das ACM SIGARCH Computer Architecture News 34 (2), 4-15, 2006 | 304 | 2006 |
| Design and analysis of an NoC architecture from performance, reliability and energy perspective J Kim, D Park, C Nicopoulos, N Vijaykrishnan, CR Das Proceedings of the 2005 ACM symposium on Architecture for networking and …, 2005 | 157 | 2005 |
| Performance and power optimization through data compression in network-on-chip architectures R Das, AK Mishra, C Nicopoulos, D Park, V Narayanan, R Iyer, MS Yousif, ... 2008 IEEE 14th International Symposium on High Performance Computer …, 2008 | 132 | 2008 |
| Nocalert: An on-line and real-time fault detection mechanism for network-on-chip architectures A Prodromou, A Panteli, C Nicopoulos, Y Sazeides 2012 45th Annual IEEE/ACM International Symposium on Microarchitecture, 60-71, 2012 | 129 | 2012 |
| A hybrid SoC interconnect with dynamic TDMA-based transaction-less buses and on-chip networks TD Richardson, C Nicopoulos, D Park, V Narayanan, Y Xie, C Das, ... 19th International Conference on VLSI Design held jointly with 5th …, 2006 | 120 | 2006 |
| Variation-aware task allocation and scheduling for MPSoC F Wang, C Nicopoulos, X Wu, Y Xie, N Vijaykrishnan 2007 IEEE/ACM International Conference on Computer-Aided Design, 598-603, 2007 | 85 | 2007 |
| Network-on-chip architectures: A holistic design exploration C Nicopoulos, V Narayanan, CR Das Springer Science & Business Media, 2009 | 74 | 2009 |
| On the effects of process variation in network-on-chip architectures C Nicopoulos, S Srinivasan, A Yanamandra, D Park, V Narayanan, ... IEEE Transactions on Dependable and Secure Computing 7 (3), 240-254, 2008 | 74 | 2008 |
| An energy-and performance-aware DRAM cache architecture for hybrid DRAM/PCM main memory systems HG Lee, S Baek, C Nicopoulos, J Kim 2011 IEEE 29th International Conference on Computer Design (ICCD), 381-387, 2011 | 65 | 2011 |
| Do we need wide flits in networks-on-chip? J Lee, C Nicopoulos, SJ Park, M Swaminathan, J Kim 2013 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 2-7, 2013 | 64 | 2013 |
| Design of a dynamic priority-based fast path architecture for on-chip interconnects D Park, R Das, C Nicopoulos, J Kim, N Vijaykrishnan, R Iyer, CR Das 15th Annual IEEE Symposium on High-Performance Interconnects (HOTI 2007), 15-20, 2007 | 64 | 2007 |
| Optimizing data-center TCO with scale-out processors B Grot, D Hardy, P Lotfi-Kamran, B Falsafi, C Nicopoulos, Y Sazeides IEEE Micro 32 (5), 52-63, 2012 | 56 | 2012 |
| ShortPath: A network-on-chip router with fine-grained pipeline bypassing A Psarras, I Seitanidis, C Nicopoulos, G Dimitrakopoulos IEEE Transactions on Computers 65 (10), 3136-3147, 2016 | 46 | 2016 |
| PhaseNoC: TDM scheduling at the virtual-channel level for efficient network traffic isolation A Psarras, I Seitanidis, C Nicopoulos, G Dimitrakopoulos 2015 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2015 | 42 | 2015 |
| ECM: Effective capacity maximizer for high-performance compressed caching S Baek, HG Lee, C Nicopoulos, J Lee, J Kim 2013 IEEE 19th International Symposium on High Performance Computer …, 2013 | 41 | 2013 |
| Variation-aware task and communication mapping for mpsoc architecture F Wang, Y Chen, C Nicopoulos, X Wu, Y Xie, N Vijaykrishnan IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2011 | 37 | 2011 |
Vijaykrishnan NarayananRobert Noll Chair Professor at The Pennsylvania State University在 cse.psu.edu 的电子邮件经过验证
