关注
Jean Simatic
Jean Simatic
Co-founder & CTO at Hawai.tech
在 simatic.org 的电子邮件经过验证
标题
引用次数
引用次数
年份
From signal transition graphs to timing closure: Application to bundled-data circuits
G Gimenez, J Simatic, L Fesquet
2019 25th IEEE International Symposium on Asynchronous Circuits and Systems …, 2019
152019
A practical framework for specification, verification, and design of self-timed pipelines
J Simatic, A Cherkaoui, F Bertrand, RP Bastos, L Fesquet
2017 23rd IEEE International Symposium on Asynchronous Circuits and Systems …, 2017
142017
High-level synthesis of an event-driven windowing process
SM Qaisar, J Simatic, L Fesquet
2017 3rd International Conference on Event-Based Control, Communication and …, 2017
132017
On-the-fly and sub-gate-delay resolution TDC based on self-timed ring: A proof of concept
A El-Hadbi, A Cherkaoui, O Elissati, J Simatic, L Fesquet
2017 15th IEEE international new circuits and systems conference (NEWCAS …, 2017
112017
New asynchronous protocols for enhancing area and throughput in bundled-data pipelines
J Simatic, A Cherkaoui, RP Bastos, L Fesquet
2016 29th Symposium on Integrated Circuits and Systems Design (SBCCI), 1-6, 2016
102016
An accurate time-to-digital converter based on a self-timed ring oscillator for on-the-fly time measurement
A El-Hadbi, A Cherkaoui, O Elissati, J Simatic, L Fesquet
Analog Integrated Circuits and Signal Processing 97, 471-481, 2018
62018
CAR: On the highway towards de-synchronization
F Bertrand, A Cherkaoui, J Simatic, A Maure, L Fesquet
2017 24th IEEE International Conference on Electronics, Circuits and Systems …, 2017
52017
Seeking low-power synchronous/asynchronous systems: A FIR implementation case study
A Skaf, J Simatic, L Fesquet
2017 IEEE International Symposium on Circuits and Systems (ISCAS), 1-4, 2017
42017
High-level synthesis for event-based systems
J Simatic, RP Bastos, L Fesquet
2016 Second International Conference on Event-based Control, Communication …, 2016
42016
From High-Level Synthesis to Bundled-Data Circuits
Y Decoudu, J Simatic, K Morin-Allory, L Fesquet
Embedded Computer Systems: Architectures, Modeling, and Simulation: 20th …, 2020
22020
Flot de conception pour l'ultra faible consommation: échantillonnage non-uniforme et électronique asynchrone
J Simatic
Université Grenoble Alpes, 2017
22017
Correctly sizing FIR filter architecture in the framework of non-uniform sampling
J Simatic, L Fesquet, B Bidegaray-Fesquet
2015 International Conference on Sampling Theory and Applications (SampTA …, 2015
12015
Desynchronizing Circuits Synthesized with CatapultC
Y Decoudu, J Simatic, K Morin-Allory, L Fesquet
IPSoC 2019, 2019
2019
Comparison of Synchronous and Asynchronous FIR Filter Architectures
Y Decoudu, J Simatic, P Alexandre, K Morin-Allory, L Fesquet
2019 5th International Conference on Event-Based Control, Communication, and …, 2019
2019
Asynchronous circuits for new computation paradigms
L Fesquet, R Frisch, M Faix, J Belot, J Simatic, A Cherkaoui, E Mazer
IEEE International Nanodevices & Computing Conference (INC 2019), 2019
2019
Event-based processing: a new paradigm for low-power
L Fesquet, S Germain, J Simatic, A Cherkaoui, T Le Pelleter, S Engels
19th IEEE Mediterranean Electrotechnical Conference (IEEE Melecon’18), 2018
2018
From events to data-driven processing
L Fesquet, J Simatic, A Darwish, A Cherkaoui, S Germain
3rd International Conference on Event-Based Control, Communication and …, 2017
2017
Event-based design for mitigating energy in electronic systems
L Fesquet, J Simatic, A Darwish, A Cherkaoui
OAGM & ARW Joint Workshop on" Computer Vision and Robotics", 2016
2016
AHLS_DESYNC: A Desynchronization Tool For High-Level Synthesis of Asynchronous Circuits
J Simatic, RP Bastos, L Fesquet
Design, Automation and Test in Europe (DATE 2016), 2016
2016
Seeking low-power synchronous/asynchronous embedded systems: an FIR implementation case study
A Skaf, J Simatic, L Fesquet
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