| A 12-bit vernier ring time-to-digital converter in 0.13 CMOS technology J Yu, FF Dai, RC Jaeger IEEE journal of solid-state circuits 45 (4), 830-842, 2010 | 294 | 2010 |
| A 12-Bit Vernier Ring Time-to-Digital Converter in 0.13 μm CMOS Technology J Yu, FF Dai, RC Jaeger VLSI Circuits, 2009 Symposium on, 232 - 233, 2009 | 294* | 2009 |
| A 3-dimensional Vernier ring time-to-digital converter in 0.13µm CMOS J Yu, FF Dai Custom Integrated Circuits Conference (CICC), 2010 IEEE, 1-4, 2010 | 52 | 2010 |
| Vernier ring time-to-digital converters with comparator matrix FF Dai, J Yu US Patent 8,138,958, 2012 | 28 | 2012 |
| An X-Band Radar Transceiver MMIC with Bandwidth Reduction in 0.13 µm SiGe Technology J Yu, F Zhao, J Cali, FF Dai, D Ma, X Geng, Y Jin, Y Yao, X Jin, JD Irwin, ... IEEE Journal of Solid-State Circuits 49 (9), 1905-1915, 2014 | 27 | 2014 |
| On-chip jitter measurement using vernier ring time-to-digital converter J Yu, FF Dai 2010 19th IEEE Asian Test Symposium, 167-170, 2010 | 21 | 2010 |
| A single-chip x-band chirp radar MMIC with stretch processing J Yu, F Zhao, J Cali, D Ma, X Geng, FF Dai, J David Irwin, A Aklian Custom Integrated Circuits Conference (CICC), 2012 IEEE, 1-4, 2012 | 12 | 2012 |
| Differential digital-to-time converter for even-order INL cancellation and supply noise/disturbance rejection ASC Li, C Yue, D Park, HI Yoon, T O'sullivan, J Yu, Y Tang US Patent 11,387,833, 2022 | 8 | 2022 |
| A direct digital synthesis based chirp radar transmitter in 0.13 µm SiGe technology J Yu, J Cali, F Zhao, FF Dai, X Jin, M Pukish, Y Jin, Z Hubbard, JD Irwin, ... 2013 IEEE Bipolar/BiCMOS Circuits and Technology Meeting (BCTM), 41-44, 2013 | 7 | 2013 |
| A 1V 1.8 GHz Low Power Differential Colpitts VCO JJ Yu, DX Wang, LM Yu, WR Yang 2006 8th International Conference on Solid-State and Integrated Circuit …, 2006 | 6 | 2006 |
| Low power digital-to-time converter (dtc) linearization ASC Li, T O'Sullivan, J Yu, Y Tang US Patent App. 17/340,953, 2022 | 3 | 2022 |
| Frequency synthesizer with selectable modes T O'sullivan, LK Leung, D Pan, J Yu, D Park US Patent 11,271,574, 2022 | 3 | 2022 |
| RECONFIGURABLE VARACTOR BANK FOR A VOLTAGE-CONTROLLED OSCILLATOR T Hung, G Zhang, J Chang, J YU, Y Jin US Patent 20,150,349,712, 2015 | 3 | 2015 |
| 一种高精度双极性带隙基准电压源的设计 冉峰， 于立明， 余建军， 王加东 微计算机信息, 243-244, 2007 | 3 | 2007 |
| A 4.8–6.8 GHz phase-locked loop with power optimized design methodology for dividers F Zhao, J Yu, J Cali, FF Dai, JD Irwin, A Aklian 2013 IEEE Bipolar/BiCMOS Circuits and Technology Meeting (BCTM), 187-190, 2013 | 2 | 2013 |
| Phase noise improvement using digitally controlled artificial dielectric J Yu, FF Dai Microwave Conference (EuMC), 2013 European, 826-829, 2013 | 1 | 2013 |
| 一种实现快速锁定的锁相环的研究 王觅， 余建军， 汪东旭 微计算机信息, 286-288, 2007 | 1 | 2007 |
| An X-band radar receiver with bandwidth reduction implemented in 0.13µm SiGe technology J Yu, D Ma, X Geng, F Zhao, J Cali, FF Dai, Y Yao, Y Jin, JD Irwin, ... 2013 IEEE Bipolar/BiCMOS Circuits and Technology Meeting (BCTM), 37-40, 2013 | | 2013 |
