Evaluating STT-RAM as an energy-efficient main memory alternative E Kültürsay, M Kandemir, A Sivasubramaniam, O Mutlu 2013 IEEE International Symposium on Performance Analysis of Systems and …, 2013 | 622 | 2013 |
Method and system for converting a single-threaded software program into an application-specific supercomputer K Ebcioglu, E Kultursay, MT Kandemir US Patent 8,966,457, 2015 | 181 | 2015 |
Compiler-based data prefetching and streaming non-temporal store generation for the intel (r) xeon phi (tm) coprocessor R Krishnaiyer, E Kultursay, P Chawla, S Preis, A Zvezdin, H Saito 2013 IEEE International Symposium on Parallel & Distributed Processing …, 2013 | 62 | 2013 |
Steep-slope devices: From dark to dim silicon K Swaminathan, E Kultursay, V Saripalli, V Narayanan, MT Kandemir, ... IEEE Micro 33 (5), 50-59, 2013 | 61 | 2013 |
Storage unsharing E Kultursay, K Ebcioglu, MT Kandemir US Patent 8,825,982, 2014 | 58 | 2014 |
Addressing end-to-end memory access latency in noc-based multicores A Sharifi, E Kultursay, M Kandemir, CR Das 2012 45th Annual IEEE/ACM International Symposium on Microarchitecture, 294-304, 2012 | 52 | 2012 |
Morphcache: A reconfigurable adaptive multi-level cache hierarchy S Srikantaiah, E Kultursay, T Zhang, M Kandemir, MJ Irwin, Y Xie 2011 IEEE 17th International Symposium on High Performance Computer …, 2011 | 52 | 2011 |
Method and system for converting a single-threaded software program into an application-specific supercomputer K Ebcioglu, E Kultursay US Patent 9,495,223, 2016 | 42 | 2016 |
Meeting midway: Improving CMP performance with memory-side prefetching P Yedlapalli, J Kotra, E Kultursay, M Kandemir, CR Das, ... Proceedings of the 22nd International Conference on Parallel Architectures …, 2013 | 42 | 2013 |
Improving energy efficiency of multi-threaded applications using heterogeneous CMOS-TFET multicores K Swaminathan, E Kultursay, V Saripalli, V Narayanan, M Kandemir, ... IEEE/ACM International Symposium on Low Power Electronics and Design, 247-252, 2011 | 41 | 2011 |
Performance enhancement under power constraints using heterogeneous CMOS-TFET multicores E Kultursay, K Swaminathan, V Saripalli, V Narayanan, MT Kandemir, ... Proceedings of the eighth IEEE/ACM/IFIP international conference on Hardware …, 2012 | 33 | 2012 |
Optimizing off-chip accesses in multicores W Ding, X Tang, M Kandemir, Y Zhang, E Kultursay Proceedings of the 36th ACM SIGPLAN Conference on Programming Language …, 2015 | 27 | 2015 |
Debugging computer programming code in a cloud debugger environment E Haba, E Kultursay, V Lifliand, AO Horowitz US Patent 9,262,300, 2016 | 18 | 2016 |
A helper thread based dynamic cache partitioning scheme for multithreaded applications M Kandemir, T Yemliha, E Kultursay Proceedings of the 48th Design Automation Conference, 954-959, 2011 | 17 | 2011 |
Scalable parallelization strategies to accelerate NuFFT data translation on multicores Y Zhang, J Liu, E Kultursay, M Kandemir, N Pitsianis, X Sun Euro-Par 2010-Parallel Processing: 16th International Euro-Par Conference …, 2010 | 11 | 2010 |
Improved cache utilization and preconditioner efficiency through use of a space-filling curve mesh element-and vertex-reordering technique SP Sastry, E Kultursay, SM Shontz, MT Kandemir Engineering with Computers 30, 535-547, 2014 | 10 | 2014 |
Method and system for converting a single-threaded software program into an application-specific supercomputer K Ebcioglu, E Kultursay US Patent 10,146,516, 2018 | 8 | 2018 |
Method and system for converting a single-threaded software program into an application-specific supercomputer K Ebcioglu, E Kultursay US Patent 11,132,186, 2021 | 7 | 2021 |
Method and system for converting a single-threaded software program into an application-specific supercomputer K Ebcioglu, E Kultursay US Patent 10,642,588, 2020 | 5 | 2020 |
Design space exploration of workload-specific last-level caches K Swaminathan, E Kultursay, V Saripalli, V Narayanan, M Kandemir Proceedings of the 2012 ACM/IEEE international symposium on Low power …, 2012 | 5 | 2012 |