| Self-heating effect in a 65 nm MOSFET at cryogenic temperatures AA Artanov, EA Gutiérrez-D, AR Cabrera-Galicia, A Kruth, C Degenhardt, ... IEEE transactions on electron devices 69 (3), 900-904, 2022 | 20 | 2022 |
| An amplified offset compensation scheme and its application in a track and hold circuit S Pourashraf, J Ramirez-Angulo, AR Cabrera-Galicia, AJ Lopez-Martin, ... IEEE Transactions on Circuits and Systems II: Express Briefs 65 (4), 416-420, 2017 | 15 | 2017 |
| Reconstitución de prácticas sociales de modelación: lo lineal a partir de análisis químicos. El caso de la curva de calibración A Galicia Sosa, L Landa Habana, AR Cabrera Galicia IE Revista de Investigación Educativa de la REDIECH 8 (15), 29-55, 2017 | 3 | 2017 |
| Towards the development of cryogenic integrated power management units AR Cabrera-Galicia, A Ashok, P Vliex, C Degenhardt, A Kruth, A Artanov, ... 2022 IEEE 15th Workshop on Low Temperature Electronics (WOLTE), 1-4, 2022 | 2 | 2022 |
| Energy Consumption, Conversion, and Transfer in Nanometric Field-Effect Transistors (FET) Used in Readout Electronics at Cryogenic Temperatures O. López-López, I. Martínez, A. Cabrera, E. A. Gutiérrez-D, D. Ferrusca, D ... Journal of Low Temperature Physics 199, 171-181, 2020 | 2 | 2020 |
| Diseño de circuitos digitales con muy bajos requerimientos de potencia AR Cabrera Galicia Obtenido de inaoe repositorio institucional: https://inaoe …, 2016 | 2 | 2016 |
| Voltage Reference and Voltage Regulator for the Cryogenic Performance Evaluation of the 22nm FDSOI Technology AR Cabrera-Galicia, A Ashok, P Vliex, A Kruth, A Zambanini, ... IEEE Open Journal of Circuits and Systems 5, 377-386, 2024 | | 2024 |
| A Cryogenic Voltage Regulator with Integrated Voltage Reference in 22 nm FDSOI Technology AR Cabrera-Galicia, A Ashok, P Vliex, A Kruth, A Zambanini, ... 2023 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS), 304-308, 2023 | | 2023 |
| Design of Power Efficient Digital Low-Dropout Circuit for Quantum Computers SBS Bhat, A Ashok, AR Cabrera Galicia, P Vliex, A Zambanini, ... DPG Frühjahrstagung SKM, 2023 | | 2023 |
| Design and Cryogenic Characterization of Integrated Circuits for Quantum Computing AR Cabrera Galicia, P Vliex, A Zambanini, S van Waasen, A Kruth, ... Jülich Quantum Computing Alliance Day 2023, 2023 | | 2023 |
| Cryogenic CMOS for Local Qubit Control and Readout–A Path to Scaling P Vliex, R Otten, S van Waasen, L Schreckenberg, J Bühler, ... Silicon Quantum Electronics Workshop 2023, 2023 | | 2023 |
| Power Integrity Challenges in Large Scale Quantum Computers and Solutions AR Cabrera-Galicia, A Ashok, P Vliex, L Schreckenberg, P Chava, ... IEEE Workshop on Quantum Computing: Devices, Cryogenic Electronics and Packaging, 2023 | | 2023 |
| Extreme Low Power Differential Pair: An Experimental Evaluation AR Cabrera-Galicia, JM Rocha-Pérez, A Díaz-Sánchez, ... 2020 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2020 | | 2020 |
| Offset compensation in a track and hold circuit S Pourashraf, J Ramirez-Angulo, AR Cabrera-Galicia, AJ Lopez-Martin, ... 2017 IEEE 60th International Midwest Symposium on Circuits and Systems …, 2017 | | 2017 |
| Dispositivo portátil auxiliar en la estimación de productos basados en códigos de barras AR Cabrera Galicia Instituto Tecnológico de Celaya, 2012 | | 2012 |
| 2023 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)| 979-8-3503-8119-1/23/$31.00© 2023 IEEE| DOI: 10.1109/APCCAS60141. 2023.00091 S Abramoni, LC Acharya, Z Aizaz, M Anupam, A Ashok, KK Avalur, ... | | |
