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YASH PATHAK
YASH PATHAK
Research scholar, Delhi Technological university, Delhi, India
在 dtu.ac.in 的电子邮件经过验证
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Analog/RF performance and effect of temperature on ferroelectric layer improved FET device with spacer
Y Pathak, BD Malhotra, R Chaujar
Silicon 14 (18), 12269-12280, 2022
122022
Detection of biomolecules in dielectric modulated double metal below ferroelectric layer FET with improved sensitivity
Y Pathak, BD Malhotra, R Chaujar
Journal of Materials Science: Materials in Electronics 33 (17), 13558-13567, 2022
112022
Tcad analysis and simulation of double metal negative capacitance fet (dm ncfet)
Y Pathak, BD Malhotra, R Chaujar
2021 Devices for Integrated Circuit (DevIC), 224-228, 2021
92021
A numerical study of analog parameter of negative capacitance field effect transistor with spacer
Y Pathak, BD Malhotra, R Chaujar
2021 7th International Conference on Signal Processing and Communication …, 2021
82021
Temperature analysis on short channel effects of modified ncfet: A simulation study
R Mann, Y Pathak, R Chaujar
2022 IEEE International Conference on Electronics, Computing and …, 2022
52022
TCAD analysis and simulation of double metal negative capacitance FET (DM NCFET). in 2021 Devices for Integrated Circuit (DevIC)
Y Pathak, BD Malhotra, R Chaujar
IEEE, 2021
52021
DFT based atomic modeling and Analog/RF analysis of ferroelectric HfO2 based improved FET device
Y Pathak, BD Malhotra, R Chaujar
Physica Scripta 98 (8), 085933, 2023
32023
Impact of temperature on negative capacitance fet: a tcad simulation study
Y Pathak, R Mann, BD Malhotra, R Chaujar
2023 2nd Edition of IEEE Delhi Section Flagship Conference (DELCON), 1-4, 2023
32023
Experimental circuit design and TCAD analysis of ion sensitive field effect transistor (ISFET) for pH sensing
Y Pathak, P Mishra, M Sharma, S Solanki, VV Agarwal, R Chaujar, ...
Materials Science and Engineering: B 299, 116951, 2024
22024
Linearity performance of double metal negative capacitance field-effect transistors: a numerical study
Y Pathak, BD Malhotra, R Chaujar
2022 IEEE VLSI Device Circuit and System (VLSI DCS), 19-23, 2022
22022
TCAD Analysis of Linearity Performance on Modified Ferroelectric Layer in FET Device with Spacer
Y Pathak, K Verma, BD Malhotra, R Chaujar
Advanced Nanoscale MOSFET Architectures: Current Trends and Future …, 2024
2024
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