| Diannao: A small-footprint high-throughput accelerator for ubiquitous machine-learning T Chen, Z Du, N Sun, J Wang, C Wu, Y Chen, O Temam ACM SIGARCH Computer Architecture News 42 (1), 269-284, 2014 | 1894 | 2014 |
| ShiDianNao: Shifting vision processing closer to the sensor Z Du, R Fasthuber, T Chen, P Ienne, L Li, T Luo, X Feng, Y Chen, ... Proceedings of the 42nd annual international symposium on computer …, 2015 | 1257 | 2015 |
| Cambricon-X: An accelerator for sparse neural networks S Zhang, Z Du, L Zhang, H Lan, S Liu, L Li, Q Guo, T Chen, Y Chen 2016 49th Annual IEEE/ACM International Symposium on Microarchitecture …, 2016 | 800 | 2016 |
| Cambricon: An instruction set architecture for neural networks S Liu, Z Du, J Tao, D Han, T Luo, Y Xie, Y Chen, T Chen ACM SIGARCH Computer Architecture News 44 (3), 393-405, 2016 | 442 | 2016 |
| Cambricon-S: Addressing irregularity in sparse neural networks through a cooperative software/hardware approach X Zhou, Z Du, Q Guo, S Liu, C Liu, C Wang, X Zhou, L Li, T Chen, Y Chen 2018 51st Annual IEEE/ACM International Symposium on Microarchitecture …, 2018 | 186 | 2018 |
| Leveraging the error resilience of machine-learning applications for designing highly energy efficient accelerators Z Du, K Palem, A Lingamneni, O Temam, Y Chen, C Wu Design Automation Conference (ASP-DAC), 2014 19th Asia and South Pacific …, 2014 | 147 | 2014 |
| Neuromorphic accelerators: A comparison between neuroscience and machine-learning approaches Z Du, DD Ben-Dayan Rubin, Y Chen, L He, T Chen, L Zhang, C Wu, ... Proceedings of the 48th International Symposium on Microarchitecture, 494-507, 2015 | 96 | 2015 |
| Tdsnn: From deep neural networks to deep spike neural networks with temporal-coding L Zhang, S Zhou, T Zhi, Z Du, Y Chen Proceedings of the AAAI conference on artificial intelligence 33 (01), 1319-1326, 2019 | 81 | 2019 |
| A small-footprint accelerator for large-scale neural networks T Chen, S Zhang, S Liu, Z Du, T Luo, Y Gao, J Liu, D Wang, C Wu, N Sun, ... ACM Transactions on Computer Systems (TOCS) 33 (2), 1-27, 2015 | 77 | 2015 |
| An accelerator for high efficient vision processing Z Du, S Liu, R Fasthuber, T Chen, P Ienne, L Li, T Luo, Q Guo, X Feng, ... IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2016 | 74 | 2016 |
| Leveraging the error resilience of neural networks for designing highly energy efficient accelerators Z Du, A Lingamneni, Y Chen, KV Palem, O Temam, C Wu IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2015 | 61 | 2015 |
| BenchIP: Benchmarking Intelligence Processors JH Tao, ZD Du, Q Guo, HY Lan, L Zhang, SY Zhou, LJ Xu, C Liu, HF Liu, ... Journal of Computer Science and Technology 33, 1-23, 2018 | 43 | 2018 |
| Retraining-based timing error mitigation for hardware neural networks J Deng, Y Fang, Z Du, Y Wang, H Li, O Temam, P Ienne, D Novo, X Li, ... 2015 Design, Automation & Test in Europe Conference & Exhibition (DATE), 593-596, 2015 | 39 | 2015 |
| Fixed-point back-propagation training X Zhang, S Liu, R Zhang, C Liu, D Huang, S Zhou, J Guo, Q Guo, Z Du, ... Proceedings of the IEEE/CVF conference on computer vision and pattern …, 2020 | 38 | 2020 |
| Rubik: A hierarchical architecture for efficient graph neural network training X Chen, Y Wang, X Xie, X Hu, A Basak, L Liang, M Yan, L Deng, Y Ding, ... IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2021 | 37 | 2021 |
| A high-throughput neural network accelerator T Chen, Z Du, N Sun, J Wang, C Wu, Y Chen, O Temam IEEE Micro 35 (3), 24-32, 2015 | 36 | 2015 |
| Balancing efficiency and flexibility for DNN acceleration via temporal GPU-systolic array integration C Guo, Y Zhou, J Leng, Y Zhu, Z Du, Q Chen, C Li, B Yao, M Guo 2020 57th ACM/IEEE Design Automation Conference (DAC), 1-6, 2020 | 26 | 2020 |
| DWM: A decomposable Winograd method for convolution acceleration D Huang, X Zhang, R Zhang, T Zhi, D He, J Guo, C Liu, Q Guo, Z Du, ... Proceedings of the AAAI Conference on Artificial Intelligence 34 (04), 4174-4181, 2020 | 24 | 2020 |
| Cambricon-G: A polyvalent energy-efficient accelerator for dynamic graph neural networks X Song, T Zhi, Z Fan, Z Zhang, X Zeng, W Li, X Hu, Z Du, Q Guo, Y Chen IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2021 | 22 | 2021 |
| Operation apparatus and method S Liu, Y Zhuang, Q Guo, T Chen, C Xiaobing, T Zhi, Z Du, Y Hao, W Zai, ... US Patent App. 16/283,711, 2019 | 22 | 2019 |
Olivier TemamDeepMind在 google.com 的电子邮件经过验证
