| Implementing image processing algorithms on FPGAs CT Johnston, KT Gribbon, DG Bailey Proceedings of the Eleventh Electronics New Zealand Conference, ENZCon’04 …, 2004 | 180 | 2004 |
| Single pass connected components analysis DG Bailey, CT Johnston Proceedings of image and vision computing New Zealand, 282-287, 2007 | 133 | 2007 |
| A real-time FPGA implementation of a barrel distortion correction algorithm with bilinear interpolation KT Gribbon, CT Johnston, DG Bailey Image and Vision Computing New Zealand, 408-413, 2003 | 130 | 2003 |
| FPGA implementation of a single pass connected components algorithm CT Johnston, DG Bailey 4th IEEE International Symposium on Electronic Design, Test and Applications …, 2008 | 129 | 2008 |
| Optimised single pass connected components analysis N Ma, DG Bailey, CT Johnston 2008 International Conference on Field-Programmable Technology, 185-192, 2008 | 102 | 2008 |
| Connected components analysis of streamed images DG Bailey, CT Johnston, N Ma 2008 International conference on field programmable logic and applications …, 2008 | 50 | 2008 |
| FPGA based remote object tracking for real-time control CT Johnston, KT Gribbon, DG Bailey International Conference on Sensing Technology, 66-72, 2005 | 44 | 2005 |
| Design patterns for image processing algorithm development on FPGAs KT Gribbon, DG Bailey, CT Johnston TENCON 2005-2005 IEEE Region 10 Conference, 1-6, 2005 | 42 | 2005 |
| A visual environment for real-time image processing in hardware (VERTIPH) CT Johnston, DG Bailey, P Lyons EURASIP Journal on Embedded Systems 2006, 1-8, 2006 | 28 | 2006 |
| Optimisation of a colour segmentation and tracking algorithm for real-time FPGA implementation CT Johnston, DG Bailey, KT Gribbon Proceedings of Image and Vision Computing New Zealand, 422-427, 2005 | 26 | 2005 |
| Using design patterns to overcome image processing constraints on FPGAs KT Gribbon, DG Bailey, CT Johnston Third IEEE International Workshop on Electronic Design, Test and …, 2006 | 23 | 2006 |
| Algorithm transformation for FPGA implementation DG Bailey, CT Johnston 2010 Fifth IEEE International Symposium on Electronic Design, Test …, 2010 | 19 | 2010 |
| Colour edge enhancement KT Gribbon, DG Bailey, CT Johnston Proceedings of Image and Vision conference New Zealand, 297-302, 2004 | 8 | 2004 |
| Gatos: a windowing operating system for fpgas DG Bailey, KT Gribbon, CT Johnston Third IEEE International Workshop on Electronic Design, Test and …, 2006 | 7 | 2006 |
| Towards a visual notation for pipelining in a visual programming language for programming FPGAs CT Johnston, DG Bailey, P Lyons Proceedings of the 7th ACM SIGCHI New Zealand chapter's international …, 2006 | 6 | 2006 |
| User evaluation and overview of a visual language for real time image processing on FPGAs CT Johnston, P Lyons, DG Bailey Proceedings of the 10th International Conference NZ Chapter of the ACM's …, 2009 | 5 | 2009 |
| AReal-TIME FPGA IMPLEMENTATION OF A BARREL DISTORTION CORRECTION ALGORITHM CT Johnston, DG Bailey Projects 10, 91-96, 2003 | 4 | 2003 |
| A visual notation for processor and resource scheduling CT Johnston, P Lyons, DG Bailey 4th IEEE International Symposium on Electronic Design, Test and Applications …, 2008 | 3 | 2008 |
| Formalisation of a visual environment for real time image processing in hardware (VERTIPH) CT Johnston, DG Bailey, P Lyons, KT Gribbon Proceedings of Image and Vision Computing New Zealand (IVCNZ’04), 291-296, 2004 | 3 | 2004 |
| Notations for multiphase pipelines CT Johnston, DG Bailey, P Lyons 2010 Fifth IEEE International Symposium on Electronic Design, Test …, 2010 | 1 | 2010 |
