| Flipping bits in memory without accessing them: An experimental study of DRAM disturbance errors Y Kim, R Daly, J Kim, C Fallin, JH Lee, D Lee, C Wilkerson, K Lai, O Mutlu ACM SIGARCH Computer Architecture News 42 (3), 361-372, 2014 | 1472 | 2014 |
| Rigel: Flexible multi-rate image processing hardware J Hegarty, R Daly, Z DeVito, J Ragan-Kelley, M Horowitz, P Hanrahan ACM transactions on graphics (TOG) 35 (4), 1-11, 2016 | 106 | 2016 |
| Type-directed scheduling of streaming accelerators D Durst, M Feldman, D Huff, D Akeley, R Daly, GL Bernstein, M Patrignani, ... Proceedings of the 41st ACM SIGPLAN Conference on Programming Language …, 2020 | 59 | 2020 |
| Cosa: Integrated verification for agile hardware design C Mattarei, M Mann, C Barrett, RG Daly, D Huff, P Hanrahan 2018 Formal Methods in Computer Aided Design (FMCAD), 1-5, 2018 | 37 | 2018 |
| Flipping bits in memory without accessing them: An experimental study of DRAM disturbance errors R Daly, C Fallin, Y Kim, C Wilkerson, D Lee, J Kim, JH Lee, K Lai, O Mutlu ACM SIGARCH Comput. Archit. News 42, 361-372, 2014 | 37 | 2014 |
| Creating an agile hardware design flow R Bahr, C Barrett, N Bhagdikar, A Carsello, R Daly, C Donovick, D Durst, ... 2020 57th ACM/IEEE Design Automation Conference (DAC), 1-6, 2020 | 30 | 2020 |
| Invoking and linking generators from multiple hardware languages using coreir R Daly, L Truong, P Hanrahan Proceedings of the 1st Workshop on Open-Source EDA Technology, 2018 | 21 | 2018 |
| Aha: An agile approach to the design of coarse-grained reconfigurable accelerators and compilers K Koul, J Melchert, K Sreedhar, L Truong, G Nyengele, K Zhang, Q Liu, ... ACM Transactions on Embedded Computing Systems 22 (2), 1-34, 2023 | 18 | 2023 |
| fault: A python embedded domain-specific language for metaprogramming portable hardware verification components L Truong, S Herbst, R Setaluri, M Mann, R Daly, K Zhang, C Donovick, ... Computer Aided Verification: 32nd International Conference, CAV 2020, Los …, 2020 | 18 | 2020 |
| Rowhammer: Reliability analysis and security implications Y Kim, R Daly, J Kim, C Fallin, JH Lee, D Lee, C Wilkerson, K Lai, O Mutlu arXiv preprint arXiv:1603.00747, 2016 | 18 | 2016 |
| CoSA: Integrated Verification for Agile Hardware Design. In 2018 Formal Methods in Computer Aided Design (FMCAD) C Mattarei, M Mann, C Barrett, RG Daly, D Huff, P Hanrahan IEEE, New York, NY, 1ś5, 2018 | 14 | 2018 |
| Automated design space exploration of cgra processing element architectures using frequent subgraph analysis J Melchert, K Feng, C Donovick, R Daly, C Barrett, M Horowitz, ... arXiv preprint arXiv:2104.14155, 2021 | 11 | 2021 |
| Synthesizing Instruction Selection Rewrite Rules from RTL using SMT. R Daly, C Donovick, J Melchert, R Setaluri, N Tsiskaridze, P Raina, ... FMCAD, 139-150, 2022 | 9 | 2022 |
| Taeyoung Kong R Bahr, C Barrett, N Bhagdikar, A Carsello, R Daly, C Donovick, D Durst, ... Qiaoyi Liu, Makai Mann, Jackson Melchert, Ankita Nayak, Aina Niemetz, Gedeon …, 2020 | 9 | 2020 |
| Apex: A framework for automated processing element design space exploration using frequent subgraph analysis J Melchert, K Feng, C Donovick, R Daly, R Sharma, C Barrett, ... Proceedings of the 28th ACM International Conference on Architectural …, 2023 | 8 | 2023 |
| Creating an agile hardware design flow. In 2020 57th ACM/IEEE Design Automation Conference (DAC) R Bahr, C Barrett, N Bhagdikar, A Carsello, R Daly, C Donovick, D Durst, ... IEEE, 2020 | 7 | 2020 |
| CoreIR: A simple LLVM-style hardware compiler R Daly | 5 | 2017 |
| PEak: A Single Source of Truth for Hardware Design and Verification C Donovick, R Daly, J Melchert, L Truong, P Raina, P Hanrahan, C Barrett arXiv preprint arXiv:2308.13106, 2023 | 3 | 2023 |
| Type-Directed Scheduling of Streaming Accelerators–Technical Appendix D Durst, M Feldman, D Huff, D Akeley, R Daly, G Bernstein, M Patrignani, ... | 3 | 2020 |
| What are the semantics of hardware GL Bernstein, J Ragan-Kelley Workshop on Languages, Tools, and Techniques for Accelerator Design (LATTE), 2021 | 1 | 2021 |
