An efficient implementation of FIR filter using high speed adders for signal processing applications S Akash, M Ajeeth, N Radha 2020 Second International Conference on Inventive Research in Computing …, 2020 | 13 | 2020 |
An efficient implementation of BCD to seven segment decoder using MGDI N Radha, M Maheswari 2018 2nd International Conference on I-SMAC (IoT in Social, Mobile …, 2018 | 12 | 2018 |
High speed efficient multiplier design using reversible gates N Radha, M Maheswari 2018 International Conference on Computer Communication and Informatics …, 2018 | 12 | 2018 |
VLSI design of parity check code with hamming code for error detection and correction G Subhasri, N Radha 2019 International Conference on Intelligent Computing and Control Systems …, 2019 | 11 | 2019 |
Design and implementation of primitive cells, full adder, full subtractor, and multiplier using modified gate diffusion input logic N Radha 2020 International Conference on Electronics and Sustainable Communication …, 2020 | 9 | 2020 |
An energy efficient multipliers using reversible gates N Radha, M Maheswari Journal of Physics: Conference Series 1706 (1), 012066, 2020 | 6 | 2020 |
Detection of Diseased Plants by Using Convolutional Neural Network M Maheswari, P Daniel, R Srinivash, N Radha Evolutionary Computing and Mobile Sustainable Networks, 659-671, 2020 | 4 | 2020 |
An Efficient Implementation of Decimal Adder Using Parallel Prefix Addition N Radha, M Ajeeth, S Akash 2019 Third International conference on I-SMAC (IoT in Social, Mobile …, 2019 | 4 | 2019 |
An empirical analysis of concatenated polar codes for 5G wireless communication N Radha, M Maheswari Telecommunication Systems 85 (1), 165-188, 2024 | 3 | 2024 |
A Modified Gate Diffusion Input Technique Based Proficient 4 Bit Priority Encoder N Radha, R Dagineeshwari, B Devadharshini 2020 International Conference on Inventive Computation Technologies (ICICT …, 2020 | 2 | 2020 |
4x4 Multiplier Implementation using Gate Diffusion Input NS Priya, N Radha 2020 International Conference on Inventive Computation Technologies (ICICT …, 2020 | 1 | 2020 |
An Energy Efficient Reconfigurable Polar Encoder for Next Generation Wireless Applications N Radha, M Maheswari 2024 5th International Conference on Smart Electronics and Communication …, 2024 | | 2024 |
Feasible Implementation of ALU for Next Generation Processors N Radha, M Maheswari, A Abinaya 2024 Third International Conference on Electrical, Electronics, Information …, 2024 | | 2024 |
An optimal channel coding scheme for high-speed data communication N Radha, M Maheswari Integration 94, 102107, 2024 | | 2024 |
Addendum Parity Check Codes for Futuristic Wireless Communications N Radha, M Maheswari, BA Kumar, B Hariharan, B Abishek 2023 4th International Conference on Electronics and Sustainable …, 2023 | | 2023 |
VLSI Architecture for Energy Detection Based Spectrum Sensing G Subhasri, N Radha 2019 International Conference on Computer Communication and Informatics …, 2019 | | 2019 |
A duck power aerial speed multipliers N Radha, A Abinaya Advances in Natural and Applied Sciences 11 (3), 176-182, 2017 | | 2017 |
An Efficient Implementation Of Polar Encoder N RADHA, P MURALIKRISHNAN International Journal of Innovations in Engineering Research and Technology …, 0 | | |