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Pushparajah Rajaguru
Pushparajah Rajaguru
在 gre.ac.uk 的电子邮件经过验证
标题
引用次数
引用次数
年份
Predicting damage and life expectancy of subsea power cables in offshore renewable energy applications
F Dinmohammadi, D Flynn, C Bailey, M Pecht, C Yin, P Rajaguru, V Robu
IEEE access 7, 54658-54669, 2019
562019
Sintered silver finite element modelling and reliability based design optimisation in power electronic module
P Rajaguru, H Lu, C Bailey
Microelectronics Reliability 55 (6), 919-930, 2015
462015
Electro-thermo-mechanical modelling and analysis of the press pack diode in power electronics
P Rajaguru, H Lu, C Bailey, J Ortiz-Gonzalez, O Alatise
2015 21st International Workshop on Thermal Investigations of ICs and …, 2015
212015
Application of Kriging and radial basis function in power electronic module wire bond structure reliability under various amplitude loading
P Rajaguru, H Lu, C Bailey
International journal of fatigue 45, 61-70, 2012
182012
Evaluation of SiC Schottky diodes using pressure contacts
JO Gonzalez, O Alatise, AM Aliyu, P Rajaguru, A Castellazzi, L Ran, ...
IEEE Transactions on Industrial Electronics 64 (10), 8213-8223, 2017
152017
An initial consideration of silicon carbide devices in pressure-packages
JAO Gonzalez, O Alatise, L Ran, P Mawby, P Rajaguru, C Bailey
2016 IEEE Energy Conversion Congress and Exposition (ECCE), 1-7, 2016
152016
Modelling and analysis of vibration on power electronic module structure and application of model order reduction
P. Rajaguru, H. Lu, C. Bailey, M. Bella
Microelectronics Reliability 110, 2020
142020
A multiphysics modeling and experimental analysis of pressure contacts in power electronics applications
P Rajaguru, JA Ortiz-Gonzalez, H Lu, C Bailey, O Alatise
IEEE Transactions on Components, Packaging and Manufacturing Technology 7 (6 …, 2017
132017
A time dependent damage indicator model for Sn3. 5Ag solder layer in power electronic module
P Rajaguru, H Lu, C Bailey
Microelectronics Reliability 55 (11), 2371-2381, 2015
112015
Smart manufacturing with artificial intelligence and digital twin: A brief review
A Malik, P Rajaguru, R Azzawi
2022 8th International Conference on Information Technology Trends (ITT …, 2022
92022
Impact of underfill and other physical dimensions on Silicon Lateral IGBT package reliability using computer model with discrete and continuous design variables
P Rajaguru, H Lu, C Bailey, A Castellazzi, V Pathirana, N Udugampola, ...
Microelectronics Reliability 83, 146-156, 2018
82018
Evaluation of the impact of the physical dimensions and material of the semiconductor chip on the reliability of Sn3. 5Ag solder interconnect in power electronic module: a …
P Rajaguru, H Lu, C Bailey, J Ortiz-Gonzalez, O Alatise
Microelectronics Reliability 68, 77-85, 2017
72017
Application of nonlinear fatigue damage models in power electronic module wirebond structure under various amplitude loadings
P Rajaguru, H Lu, C Bailey
Advances in Manufacturing 2, 239-250, 2014
72014
Numerical modelling methodology for design of miniaturised integrated products-an application to 3D CMM micro-probe development
P Rajaguru, S Stoyanov, YK Tang, C Bailey, J Claverley, R Leach, ...
2010 11th International Thermal, Mechanical & Multi-Physics Simulation, and …, 2010
72010
Application of particle swarm optimisation to evaluation of polymer cure kinetics models
T Tilford, M Ferenets, JE Morris, A Krumme, S Pavuluri, PR Rajaguru, ...
Journal of Algorithms & Computational Technology 4 (1), 121-146, 2010
62010
PHM of Subsea Cables
D Flynn, C Bailey, P Rajaguru, W Tang, C Yin
Prognostics and Health Management of Electronics: Fundamentals, Machine …, 2018
52018
Application of Kriging and radial basis function for reliability optimization in power modules
P Rajaguru, S Stoyanov, H Lu, C Bailey
Journal of Electronic Packaging 135 (2), 021009, 2013
52013
Impact of wide band gap devices on power electronics packaging designs
C Bailey, P Rajaguru, H Lu
2017 Pan Pacific Microelectronics Symposium (Pan Pacific), 1-6, 2017
42017
Optimising thermo mechanical behaviour of power electronic module structures
P Rajaguru, C Bailey, H Lu
2016 Pan Pacific Microelectronics Symposium (Pan Pacific), 1-7, 2016
42016
Reduced order modelling for risk mitigation in design of miniaturised/integrated products
S Stoyanov, P Rajaguru, YK Tang, C Bailey, J Claverley, R Leach
33rd International Spring Seminar on Electronics Technology, ISSE 2010, 402-407, 2010
42010
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