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Aditya Iyer
Aditya Iyer
在 gatech.edu 的电子邮件经过验证
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On continuing dnn accelerator architecture scaling using tightly coupled compute-on-memory 3-d ics
G Murali, A Iyer, L Zhu, J Tong, FM Martínez, SR Srinivasa, T Karnik, ...
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2023
32023
3DNN-Xplorer: A Machine Learning Framework for Design Space Exploration of Heterogeneous 3-D DNN Accelerators
G Murali, MG Park, SK Lim
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2024
2024
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