A review of sensor-based methods for monitoring hydrogen sulfide SK Pandey, KH Kim, KT Tang TrAC Trends in Analytical Chemistry 32, 87-99, 2012 | 422 | 2012 |
A 65nm 1Mb nonvolatile computing-in-memory ReRAM macro with sub-16ns multiply-and-accumulate for binary DNN AI edge processors WH Chen, KX Li, WY Lin, KH Hsu, PY Li, CH Yang, CX Xue, EY Yang, ... 2018 IEEE International Solid-State Circuits Conference-(ISSCC), 494-496, 2018 | 334 | 2018 |
24.1 A 1Mb multibit ReRAM computing-in-memory macro with 14.6 ns parallel MAC computing time for CNN based AI edge processors CX Xue, WH Chen, JS Liu, JF Li, WY Lin, WE Lin, JH Wang, WC Wei, ... 2019 IEEE International Solid-State Circuits Conference-(ISSCC), 388-390, 2019 | 267 | 2019 |
Towards a chemiresistive sensor-integrated electronic nose: a review SW Chiu, KT Tang Sensors 13 (10), 14214-14247, 2013 | 245 | 2013 |
24.5 A twin-8T SRAM computation-in-memory macro for multiple-bit CNN-based machine learning X Si, JJ Chen, YN Tu, WH Huang, JH Wang, YC Chiu, WC Wei, SY Wu, ... 2019 IEEE International Solid-State Circuits Conference-(ISSCC), 396-398, 2019 | 228 | 2019 |
15.4 A 22nm 2Mb ReRAM compute-in-memory macro with 121-28TOPS/W for multibit MAC computing for tiny AI edge devices CX Xue, TY Huang, JS Liu, TW Chang, HY Kao, JH Wang, TW Liu, ... 2020 IEEE International Solid-State Circuits Conference-(ISSCC), 244-246, 2020 | 214 | 2020 |
CMOS-integrated memristive non-volatile computing-in-memory for AI edge processors WH Chen, C Dou, KX Li, WY Lin, PY Li, JH Huang, JH Wang, WC Wei, ... Nature Electronics 2 (9), 420-428, 2019 | 197 | 2019 |
15.5 A 28nm 64Kb 6T SRAM computing-in-memory macro with 8b MAC operation for AI edge chips X Si, YN Tu, WH Huang, JW Su, PJ Lu, JH Wang, TW Liu, SY Wu, R Liu, ... 2020 IEEE international solid-state circuits conference-(ISSCC), 246-248, 2020 | 183 | 2020 |
A twin-8T SRAM computation-in-memory unit-macro for multibit CNN-based AI edge processors X Si, JJ Chen, YN Tu, WH Huang, JH Wang, YC Chiu, WC Wei, SY Wu, ... IEEE Journal of Solid-State Circuits 55 (1), 189-202, 2019 | 158 | 2019 |
15.2 A 28nm 64Kb inference-training two-way transpose multibit 6T SRAM compute-in-memory macro for AI edge chips JW Su, X Si, YC Chou, TW Chang, WH Huang, YN Tu, R Liu, PJ Lu, ... 2020 IEEE International Solid-State Circuits Conference-(ISSCC), 240-242, 2020 | 157 | 2020 |
16.1 A 22nm 4Mb 8b-precision ReRAM computing-in-memory macro with 11.91 to 195.7 TOPS/W for tiny AI edge devices CX Xue, JM Hung, HY Kao, YH Huang, SP Huang, FC Chang, P Chen, ... 2021 IEEE International Solid-State Circuits Conference (ISSCC) 64, 245-247, 2021 | 145 | 2021 |
Development of a portable electronic nose system for the detection and classification of fruity odors KT Tang, SW Chiu, CH Pan, HY Hsieh, YS Liang, SC Liu Sensors 10 (10), 9179-9193, 2010 | 136 | 2010 |
16.3 A 28nm 384kb 6T-SRAM computation-in-memory macro with 8b precision for AI edge chips JW Su, YC Chou, R Liu, TW Liu, PJ Lu, PC Wu, YL Chung, LY Hung, ... 2021 IEEE International Solid-State Circuits Conference (ISSCC) 64, 250-252, 2021 | 134 | 2021 |
A battery-less, implantable neuro-electronic interface for studying the mechanisms of deep brain stimulation in rat models YP Lin, CY Yeh, PY Huang, ZY Wang, HH Cheng, YT Li, CF Chuang, ... IEEE transactions on biomedical circuits and systems 10 (1), 98-112, 2015 | 108 | 2015 |
A CMOS-integrated compute-in-memory macro based on resistive random-access memory for AI edge devices CX Xue, YC Chiu, TW Liu, TY Huang, JS Liu, TW Chang, HY Kao, ... Nature Electronics 4 (1), 81-90, 2021 | 105 | 2021 |
A 28nm 1Mb time-domain computing-in-memory 6T-SRAM macro with a 6.6 ns latency, 1241GOPS and 37.01 TOPS/W for 8b-MAC operations for edge-AI devices PC Wu, JW Su, YL Chung, LY Hong, JS Ren, FC Chang, Y Wu, HY Chen, ... 2022 IEEE International Solid-State Circuits Conference (ISSCC) 65, 1-3, 2022 | 82 | 2022 |
Embedded 1-Mb ReRAM-based computing-in-memory macro with multibit input and weight for CNN-based AI edge processors CX Xue, WH Chen, JS Liu, JF Li, WY Lin, WE Lin, JH Wang, WC Wei, ... IEEE Journal of Solid-State Circuits 55 (1), 203-215, 2019 | 82 | 2019 |
A 4-Kb 1-to-8-bit configurable 6T SRAM-based computation-in-memory unit-macro for CNN-based AI edge processors YC Chiu, Z Zhang, JJ Chen, X Si, R Liu, YN Tu, JW Su, WH Huang, ... IEEE Journal of Solid-State Circuits 55 (10), 2790-2801, 2020 | 77 | 2020 |
VLSI implementation of a bio-inspired olfactory spiking neural network HY Hsieh, KT Tang IEEE transactions on neural networks and learning systems 23 (7), 1065-1073, 2012 | 75 | 2012 |
A local computing cell and 6T SRAM-based computing-in-memory macro with 8-b MAC operation for edge AI chips X Si, YN Tu, WH Huang, JW Su, PJ Lu, JH Wang, TW Liu, SY Wu, R Liu, ... IEEE Journal of Solid-State Circuits 56 (9), 2817-2831, 2021 | 74 | 2021 |