Design issues and considerations for low-cost 3-D TSV IC technology G Van der Plas, P Limaye, I Loi, A Mercha, H Oprins, C Torregiani, S Thijs, ... IEEE Journal of Solid-State Circuits 46 (1), 293-307, 2010 | 393 | 2010 |
Method of transferring ultra-thin substrates and application of the method to the manufacture of a multi-layered thin film device E Beyne, A Coello-Vera, O Vendier US Patent 6,730,997, 2004 | 327 | 2004 |
Method of fabrication of a microstructure having an internal cavity HAC Tilmans, E Beyne, M Van de Peer US Patent 6,297,072, 2001 | 317 | 2001 |
MEMS for wireless communications:‘from RF-MEMS components to RF-MEMS-SiP’ HAC Tilmans, W De Raedt, E Beyne Journal of Micromechanics and Microengineering 13 (4), S139, 2003 | 306 | 2003 |
3-D technology assessment: Path-finding the technology/design sweet-spot P Marchal, B Bougard, G Katti, M Stucchi, W Dehaene, A Papanikolaou, ... Proceedings of the IEEE 97 (1), 96-107, 2009 | 292 | 2009 |
3D integration by Cu-Cu thermo-compression bonding of extremely thinned bulk-Si die containing 10 μm pitch through-Si vias B Swinnen, W Ruythooren, P De Moor, L Bogaerts, L Carbonell, ... 2006 international electron devices meeting, 1-4, 2006 | 264 | 2006 |
Image sensor ball grid array package and the fabrication thereof E Beyne, S Lerner US Patent 6,566,745, 2003 | 245 | 2003 |
3D system integration technologies E Beyne 2006 International Symposium on VLSI Technology, Systems, and Applications, 1-9, 2006 | 232 | 2006 |
Method and system for fabrication of integrated tunable/switchable passive microwave and millimeter wave modules H Tilmans, E Beyne, H Jansen, W De Raedt US Patent 6,876,056, 2005 | 222 | 2005 |
Method for insertion bonding and device thus obtained E Beyne, P Limaye US Patent 9,508,665, 2016 | 181 | 2016 |
3D stacked IC demonstration using a through silicon via first approach J Van Olmen, A Mercha, G Katti, C Huyghebaert, J Van Aelst, E Seppala, ... 2008 IEEE International Electron Devices Meeting, 1-4, 2008 | 181 | 2008 |
The 3-D interconnect technology landscape E Beyne IEEE Design & Test 33 (3), 8-20, 2016 | 171 | 2016 |
The rise of the 3rd dimension for system intergration E Beyne 2006 International Interconnect Technology Conference, 1-5, 2006 | 165 | 2006 |
Hermal cycling reliability of SnAgCu and SnPb solder joints: A comparison for several IC-packages B Vandevelde, M Gonzalez, P Limaye, P Ratchev, E Beyne 5th International Conference on Thermal and Mechanical Simulation and …, 2004 | 163 | 2004 |
Bow-tie slot antenna fed by CPW EA Soliman, S Brebels, P Delmotte, GAE Vandenbosch, E Beyne Electronics letters 35 (7), 514-515, 1999 | 158 | 1999 |
Scalable, sub 2μm pitch, Cu/SiCN to Cu/SiCN hybrid wafer-to-wafer bonding technology E Beyne, SW Kim, L Peng, N Heylen, J De Messemaeker, OO Okudur, ... 2017 IEEE International Electron Devices Meeting (IEDM), 32.4. 1-32.4. 4, 2017 | 147 | 2017 |
Multilayer thin-film MCM-D for the integration of high-performance RF and microwave circuits G Carchon, K Vaesen, S Brebels, W De Raedt, E Beyne, B Nauwelaers IEEE Transactions on Components and Packaging Technologies 24 (3), 510-519, 2001 | 147 | 2001 |
Method for producing electrical through hole interconnects and devices made thereof E Beyne, R Labie US Patent 6,908,856, 2005 | 142 | 2005 |
Cu pumping in TSVs: Effect of pre-CMP thermal budget I De Wolf, K Croes, OV Pedreira, R Labie, A Redolfi, M Van De Peer, ... Microelectronics Reliability 51 (9-11), 1856-1859, 2011 | 141 | 2011 |
Comprehensive analysis of the impact of single and arrays of through silicon vias induced stress on high-k/metal gate CMOS performance A Mercha, G Van der Plas, V Moroz, I De Wolf, P Asimakopoulos, N Minas, ... 2010 International Electron Devices Meeting, 2.2. 1-2.2. 4, 2010 | 140 | 2010 |