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Avirup Dasgupta
Avirup Dasgupta
在 ece.iitr.ac.in 的电子邮件经过验证 - 首页
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引用次数
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年份
Capacitance Modeling in Dual Field-Plate Power GaN HEMT for Accurate Switching Behavior
S Aamir Ahsan, S Ghosh, K Sharma, A Dasgupta, S Khandelwal, ...
IEEE Transactions on Electron Devices 63 (2), 2016
95*2016
BSIM-CMG: Standard FinFET compact model for advanced circuit design
JP Duarte, S Khandelwal, A Medury, C Hu, P Kushwaha, H Agarwal, ...
ESSCIRC Conference 2015-41st European Solid-State Circuits Conference …, 2015
952015
Proposal for capacitance matching in negative capacitance field-effect transistors
H Agarwal, P Kushwaha, YK Lin, MY Kao, YH Liao, A Dasgupta, ...
IEEE Electron Device Letters 40 (3), 463-466, 2019
802019
Surface-Potential-Based Compact Modeling of Gate Current in AlGaN/GaN HEMTs
S Ghosh, A Dasgupta, S Khandelwal, S Agnihotri, YS Chauhan
IEEE Transactions on Electron Devices 62 (2), 443-448, 2014
702014
Compact modeling of temperature effects in FDSOI and FinFET devices down to cryogenic temperatures
G Pahwa, P Kushwaha, A Dasgupta, S Salahuddin, C Hu
IEEE Transactions on Electron Devices 68 (9), 4223-4230, 2021
542021
BSIM compact model of quantum confinement in advanced nanosheet FETs
A Dasgupta, SS Parihar, P Kushwaha, H Agarwal, MY Kao, S Salahuddin, ...
IEEE Transactions on Electron Devices 67 (2), 730-737, 2020
492020
Asm-hemt: Compact model for gan hemts
A Dasgupta, S Ghosh, YS Chauhan, S Khandelwal
2015 IEEE International Conference on Electron Devices and Solid-State …, 2015
462015
Surface Potential Based Modeling of Thermal Noise for HEMT Circuit Simulation
A Dasgupta, S Khandelwal, YS Chauhan
IEEE Microwave and Wireless Components Letters 25 (6), 376-378, 2015
452015
Spacer Engineering in Negative Capacitance FinFETs
YK Lin, H Agarwal, MY Kao, J Zhou, YH Liao, A Dasgupta, P Kushwaha, ...
IEEE Electron Device Letters 40 (6), 1009-1012, 2019
412019
Compact Modeling of Flicker Noise in HEMTs
A Dasgupta, S Khandelwal, YS Chauhan
IEEE Journal of Electron Devices Society 2 (6), 174-178, 2014
392014
Design optimization techniques in nanosheet transistor for RF applications
P Kushwaha, A Dasgupta, MY Kao, H Agarwal, S Salahuddin, C Hu
IEEE Transactions on Electron Devices 67 (10), 4515-4520, 2020
372020
GaN HEMT Modeling for Power and RF Applications using ASM-HEMT
S Ghosh, SA Ahsan, A Dasgupta, S Khandelwal, YS Chauhan
IEEE International Conference on Emerging Electronics (ICEE, 2016
352016
Characterization and Modeling of Flicker Noise in FinFETs at Advanced Technology node
P Kushwaha, H Agarwal, YK Lin, A Dasgupta, MY Kao, Y Lu, Y Yue, ...
IEEE Electron Device Letters 40 (6), 985-988, 2019
342019
Compact model for geometry dependent mobility in nanosheet FETs
A Dasgupta, SS Parihar, H Agarwal, P Kushwaha, YS Chauhan, C Hu
IEEE Electron Device Letters 41 (3), 313-316, 2020
272020
Compact Modeling of Surface Potential, Charge and Current in Nanoscale Transistors under Quasi-Ballistic Regime
A Dasgupta, A Agarwal, S Khandelwal, YS Chauhan
IEEE Transactions on Electron Devices 63 (11), 4151-4159, 2016
272016
Unified compact model for nanowire transistors including quantum effects and quasi-ballistic transport
A Dasgupta, A Agarwal, YS Chauhan
IEEE Transactions on Electron Devices 64 (4), 1837-1845, 2017
242017
Optimization of NCFET by Matching Dielectric and Ferroelectric Nonuniformly along the Channel
MY Kao, YK Lin, H Agarwal, YH Liao, P Kushwaha, A Dasgupta, ...
IEEE Electron Device Letters 40 (5), 822-825, 2019
222019
Compact Modeling of Negative-Capacitance FDSOI FETs for Circuit Simulations
CK Dabhi, SS Parihar, A Dasgupta, YS Chauhan
IEEE Transactions on Electron Devices 67 (7), 2710-2716, 2020
212020
Compact Modeling of Cross-Sectional Scaling in Gate-All-Around FETs: 3-D to 1-D Transition
A Dasgupta, P Rastogi, A Agarwal, C Hu, YS Chauhan
IEEE Transactions on Electron Devices, 2018
212018
Effect of access region and field plate on capacitance behavior of GaN HEMT
K Sharma, A Dasgupta, S Ghosh, SA Ahsan, S Khandelwal, YS Chauhan
2015 IEEE International Conference on Electron Devices and Solid-State …, 2015
192015
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