Robust multipath routing TM Conte US Patent 8,582,502, 2013 | 299 | 2013 |
Optimization of instruction fetch mechanisms for high issue rates TM Conte, KN Menezes, PM Mills, BA Patel Proceedings of the 22nd Annual International Symposium on Computer …, 1995 | 258 | 1995 |
Adaptive mode control: A static-power-efficient cache design H Zhou, MC Toburen, E Rotenberg, TM Conte ACM Transactions on Embedded Computing Systems (TECS) 2 (3), 347-372, 2003 | 253 | 2003 |
Reducing state loss for effective trace sampling of superscalar processors TM Conte, MA Hirsch, KN Menezes Proceedings International Conference on Computer Design. VLSI in Computers …, 1996 | 236 | 1996 |
Unified assign and schedule: A new approach to scheduling for clustered register file microarchitectures E Ozer, S Banerjia, TM Conte Proceedings. 31st Annual ACM/IEEE International Symposium on …, 1998 | 226 | 1998 |
A benchmark characterization of the EEMBC benchmark suite JA Poovey, TM Conte, M Levy, S Gal-On IEEE micro 29 (5), 18-29, 2009 | 199 | 2009 |
Configurable string matching hardware for speeding up intrusion detection M Aldwairi, T Conte, P Franzon ACM SIGARCH Computer Architecture News 33 (1), 99-107, 2005 | 170 | 2005 |
Challenges to combining general-purpose and multimedia processors TM Conte, PK Dubey, MD Jennings, RB Lee, A Peleg, S Rathnam, ... Computer 30 (12), 33-37, 1997 | 141 | 1997 |
Performance analysis and its impact on design P Bose, TM Conte Computer 31 (5), 41-49, 1998 | 125 | 1998 |
Touch screen with tactile feedback TM Conte, B Mangione-Smith US Patent 9,372,536, 2016 | 124 | 2016 |
Comparing software and hardware schemes for reducing the cost of branches WW Hwu, TM Conte, PP Chang ACM SIGARCH Computer Architecture News 17 (3), 224-233, 1989 | 113 | 1989 |
Instruction fetch mechanisms for VLIW architectures with compressed encodings TM Conte, S Banerjia, SY Larin, KN Menezes, SW Sathaye Proceedings of the 29th Annual IEEE/ACM International Symposium on …, 1996 | 106 | 1996 |
The effect of code expanding optimizations on instruction cache design WY Chen, PP Chang, TM Conte, WW Hwu IEEE Transactions on Computers 42 (9), 1045-1057, 1993 | 99 | 1993 |
Treegion scheduling for wide issue processors WA Havanki, S Banerjia, TM Conte High-Performance Computer Architecture, 1998. Proceedings., 1998 Fourth …, 1998 | 95 | 1998 |
Using branch handling hardware to support profile-driven optimization TM Conte, BA Patel, JS Cox Proceedings of the 27th Annual International Symposium on Microarchitecture …, 1994 | 95 | 1994 |
Accurate and practical profile-driven compilation using the profile buffer TM Conte, KN Menezes, MA Hirsch Proceedings of the 29th Annual IEEE/ACM International Symposium on …, 1996 | 94 | 1996 |
Compiler-driven cached code compression schemes for embedded ILP processors SY Larin, TM Conte Microarchitecture, 1999. MICRO-32. Proceedings. 32nd Annual International …, 1999 | 93 | 1999 |
Benchmark characterization TM Conte, WMW Hwu Computer 24 (1), 48-56, 1991 | 90 | 1991 |
Enhancing memory level parallelism via recovery-free value prediction H Zhou, TM Conte Proceedings of the 17th annual international conference on Supercomputing …, 2003 | 88 | 2003 |
Elderly fall detection A Wolfe, TM Conte US Patent App. 12/436,462, 2010 | 83 | 2010 |