| The Intel® Pentium® M Processor: Microarchitecture and Performance. S Gochman, R Ronen, I Anati, A Berkovits, T Kurts, A Naveh, A Saeed, ... Intel technology journal 7 (2), 2003 | 318 | 2003 |
| Memory system for multiple data types Z Sperber, G Peled, D Orenstein, E Cohen, G Malka US Patent 6,557,083, 2003 | 85 | 2003 |
| Fusion of processor micro-operations S Gochman, I Anati, Z Sperber, R Valentine US Patent 6,920,546, 2005 | 79 | 2005 |
| System and method of converting data formats and communicating between execution units Z Sperber, I Anati, O Liron, M Abdallah US Patent 7,430,656, 2008 | 63 | 2008 |
| Representing a plurality of instructions with a fewer number of micro-operations R Valentine, I Anati, Z Sperber, I Ouziel, G Pribush, A Leibovitz US Patent 8,082,430, 2011 | 57 | 2011 |
| Memory system for multiple data types Z Sperber, G Peled, D Orenstein, E Cohen, G Malka US Patent 6,944,720, 2005 | 45 | 2005 |
| Gather using index array and finite state machine Z Sperber, R Valentine, G Patkin, S Shwartsman, S Raikin, I Yanover, ... US Patent 8,972,697, 2015 | 38 | 2015 |
| Mechanisms to handle free physical register identifiers for smt out-of-order processors Z Sperber, DJ Sager, F Latorre, O Lempel, E Krimer, B Shomar US Patent App. 12/165,186, 2009 | 34 | 2009 |
| Scatter using index array and finite state machine Z Sperber, R Valentine, S Raikin, S Shwartsman, G Ofir, I Yanover, ... US Patent 9,626,333, 2017 | 32 | 2017 |
| Combining instructions including an instruction that performs a sequence of transformations to isolate one transformation S Gueron, Z Sperber US Patent 8,879,725, 2014 | 31 | 2014 |
| Texture engine state variable synchronizer G Malka, Z Sperber, Y Shenhav US Patent 6,947,053, 2005 | 31 | 2005 |
| Z-compression mechanism D Orenstein, G Peled, Z Sperber, E Cohen, G Malka US Patent 6,580,427, 2003 | 31 | 2003 |
| Power reduction by using on-demand reservation station size T Weiner, Z Sperber, S Lahav, G Patkin, G Berger, I Feldman, O Levy, ... US Patent App. 13/728,696, 2014 | 30 | 2014 |
| GENERATING AND PERFORMING DEPENDENCY CONTROLLED FLOW COMPRISING MULTIPLE MICRO-OPERATIONS (uops) Z Sperber, S Lahav, G Patkin, S Rubanovich, A Gradstein, Y Bustan US Patent App. 12/146,390, 2009 | 30 | 2009 |
| Systems and methods for performing 16-bit floating-point matrix dot product instructions AF Heinecke, R Valentine, MJ Charney, R Sade, M Adelman, Z Sperber, ... US Patent 10,963,246, 2021 | 28 | 2021 |
| Tracking an oldest processor event using information stored in a register and queue entry A Sodani, VB Kadgi, Z Sperber US Patent 7,721,076, 2010 | 28 | 2010 |
| Packed data rearrangement control indexes precursors generation processors, methods, systems, and instructions S Abraham, R Valentine, E Ould-Ahmed-Vall, Z Sperber, A Gradstein US Patent 9,639,354, 2017 | 27 | 2017 |
| Systems and methods for performing instructions to transpose rectangular tiles R Sade, R Valentine, MJ Charney, S Rubanovich, A Gradstein, Z Sperber, ... US Patent 10,866,786, 2020 | 26 | 2020 |
| Systems, methods, and apparatuses for tile matrix multiplication and accumulation R Valentine, Z Sperber, MJ Charney, BL Toll, R Rappoport, ... US Patent 11,086,623, 2021 | 25 | 2021 |
| Systems, apparatuses, and methods for performing conversion of a mask register into a vector register. E Ould-Ahmed-Vall, R Valentine, J Corbal, BL Toll, MJ Charney, ... US Patent App. 13/992,235, 2014 | 25 | 2014 |
