| Fort-NoCs: Mitigating the threat of a compromised NoC DM Ancajas, K Chakraborty, S Roy Proceedings of the 51st Annual Design Automation Conference, 1-6, 2014 | 156 | 2014 |
| Runtime detection of a bandwidth denial attack from a rogue network-on-chip R JS, DM Ancajas, K Chakraborty, S Roy Proceedings of the 9th International Symposium on Networks-on-Chip, 1-8, 2015 | 83 | 2015 |
| Exploring high-throughput computing paradigm for global routing Y Han, DM Ancajas, K Chakraborty, S Roy IEEE Transactions on Very Large Scale Integration (VLSI) Systems 22 (1), 155-167, 2013 | 38 | 2013 |
| Proactive aging management in heterogeneous NoCs through a criticality-driven routing approach DM Ancajas, K Chakraborty, S Roy 2013 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2013 | 23 | 2013 |
| Wearout resilience in NoCs through an aging aware adaptive routing algorithm DM Ancajas, K Bhardwaj, K Chakraborty, S Roy IEEE Transactions on Very Large Scale Integration (VLSI) Systems 23 (2), 369-373, 2014 | 20 | 2014 |
| Efficiently tolerating timing violations in pipelined microprocessors K Chakraborty, B Cozzens, S Roy, DM Ancajas Proceedings of the 50th Annual Design Automation Conference, 1-8, 2013 | 18 | 2013 |
| HCI-tolerant NoC router microarchitecture DM Ancajas, JMC Nickerson, K Chakraborty, S Roy Proceedings of the 50th Annual Design Automation Conference, 1-10, 2013 | 17 | 2013 |
| Mitigating NBTI in the physical register file through stress prediction S Kothawade, DM Ancajas, K Chakraborty, S Roy 2012 IEEE 30th International Conference on Computer Design (ICCD), 345-351, 2012 | 12 | 2012 |
| Security measures against a rogue Network-on-Chip R JayashankaraShridevi, DM Ancajas, K Chakraborty, S Roy Journal of Hardware and Systems Security 1, 173-187, 2017 | 10 | 2017 |
| Dynamic memory relocation DM Ancajas, K Chakraborty, S Roy US Patent 9,063,667, 2015 | 8 | 2015 |
| Dual core capability of a 32-bit DLX microprocessor DMB Ancajas, AP Ballesil, JRE Hizon, EA Opelinia, JAP Reyes, ... TENCON 2007-2007 IEEE Region 10 Conference, 1-4, 2007 | 6 | 2007 |
| Tackling voltage emergencies in NoC through timing error resilience R JayashankaraShridevi, DM Ancajas, K Chakraborty, S Roy 2015 IEEE/ACM International Symposium on Low Power Electronics and Design …, 2015 | 5 | 2015 |
| Hot carrier injection tolerant network on chip router architecture DM Ancajas, K Chakraborty, S Roy US Patent 10,193,827, 2019 | 4 | 2019 |
| Tackling QoS-induced aging in exascale systems through agile path selection DM Ancajas, K Chakraborty, S Roy, J Allred Proceedings of the 2014 International Conference on Hardware/Software …, 2014 | 4 | 2014 |
| Hot carrier injection tolerant network on chip router architecture DM Ancajas, K Chakraborty, S Roy US Patent App. 14/056,804, 2015 | 3 | 2015 |
| Dmr3d: dynamic memory relocation in 3d multicore systems DM Ancajas, K Chakraborty, S Roy Proceedings of the 50th Annual Design Automation Conference, 1-9, 2013 | 1 | 2013 |
| Runtime detection of a bandwidth denial attack from a rogue interconnect RJ Shridevi, DM Ancajas, K Chakraborty, S Roy US Patent 10,057,281, 2018 | | 2018 |
| Mitigating a compromised network on chip DM Ancajas, K Chakraborty, S Roy US Patent 9,652,611, 2017 | | 2017 |
| 2015 Index IEEE Transactions on Very Large Scale Integration (VLSI) Systems Vol. 23 SM Abbas, G Acconcia, A Afzali-Kusha, N Aghaee, A Aghaie, M Ahmadi, ... IEEE Transactions on Very Large Scale Integration (VLSI) Systems 23 (12), 3153, 2015 | | 2015 |
| Design of reliable and secure network-on-chip architectures DMB Ancajas Utah State University, 2015 | | 2015 |
Sanghamitra RoyUtah State University在 usu.edu 的电子邮件经过验证
