Analysis of the subthreshold CMOS logic inverter SM Sharroush Ain Shams Engineering Journal 9 (4), 1001-1017, 2018 | 26 | 2018 |
Subthreshold MOSFET transistor amplifier operation SM Sharroush, YS Abdalla, AA Dessouki, ESA El-Badawy 2009 4th international design and test workshop (IDT), 1-6, 2009 | 25 | 2009 |
Impact of technology scaling on the performance of domino CMOS logic SM Sharroush, YS Abdalla, AA Dessouki, ESA El-Badawy 2008 International Conference on Electronic Design, 1-7, 2008 | 21 | 2008 |
Design of the CMOS inverter‐based amplifier: A quantitative approach SM Sharroush International Journal of Circuit Theory and Applications 47 (7), 1006-1036, 2019 | 17 | 2019 |
A voltage-controlled ring oscillator based on an FGMOS transistor SM Sharroush Microelectronics journal 66, 167-186, 2017 | 16 | 2017 |
Speeding-up wide-fan in domino logic using a controlled strong PMOS keeper SM Sharroush, YS Abdalla, AA Dessouki, ESA El-Badawy 2008 International Conference on Computer and Communication Engineering, 633-637, 2008 | 14 | 2008 |
Dynamic Random-Access Memories without Sense Amplifiers SM Sharroush, YS Abdalla, AA Dessouki, ESA El-Badawy e & i Elektrotechnik und Informationstechnik 129, 88-101, 2012 | 13 | 2012 |
Compensating for the keeper current of CMOS domino logic using a well designed NMOS transistor SM Sharroush, YS Abdalla, AA Dessouki, ESA El-Badawy 2009 National Radio Science Conference, 1-8, 2009 | 12 | 2009 |
Design techniques for high performance MOS digital integrated circuits SM Sharroush Doctor of Philosophy Thesis, Port Said University, Egypt, 2011 | 11 | 2011 |
Reading DRAM cells using two properly designed cascaded inverters SM Sharroush e & i Elektrotechnik und Informationstechnik 2 (131), 41-52, 2014 | 8 | 2014 |
A novel low-power and high-speed dynamic CMOS logic circuit technique SM Sharroush, YS Abdalla, AA Dessouki, ESA El-Badawy 2009 National Radio Science Conference, 1-8, 2009 | 8 | 2009 |
Performance optimization of MOS current-mode logic SM Sharroush 2016 International Conference on Electrical, Electronics, and Optimization …, 2016 | 7 | 2016 |
Parameter extraction and modelling of the MOS transistor by an equivalent resistance SM Sharroush, YS Abdalla Mathematical and Computer Modelling of Dynamical Systems 27 (1), 50-86, 2021 | 6 | 2021 |
A predischarged bitline 1T-1C DRAM readout scheme SM Sharroush Microelectronics Journal 83, 168-184, 2019 | 6 | 2019 |
Understanding the behavior of RTD-loaded NMOS inverter through compact-form analysis SM Sharroush Ain Shams Engineering Journal 9 (4), 2453-2478, 2018 | 6 | 2018 |
A novel variable-gain amplifier based on an FGMOS transistor SM Sharroush 2016 5th International Conference on Electronic Devices, Systems and …, 2016 | 6 | 2016 |
Time-domain readout of 1T–1C DRAM cells SM Sharroush Journal of Circuits, Systems and Computers 27 (01), 1850005, 2018 | 5 | 2018 |
Impact of technology scaling on the performance of DRAMs SM Sharroush 2016 5th International Conference on Electronic Devices, Systems and …, 2016 | 5 | 2016 |
A novel low-latency DRAM based on the bitline-discharge rate SM Sharroush International Journal of Electronics 105 (12), 2009-2032, 2018 | 4 | 2018 |
A novel high-performance time-balanced wide fan-in CMOS circuit SM Sharroush Alexandria Engineering Journal 55 (3), 2565-2582, 2016 | 4 | 2016 |