A data-oriented survey of context models C Bolchini, CA Curino, E Quintarelli, FA Schreiber, L Tanca ACM Sigmod Record 36 (4), 19-26, 2007 | 476 | 2007 |
TMR and Partial Dynamic Reconfiguration to mitigate SEU faults in FPGAs C Bolchini, A Miele, MD Santambrogio 22nd IEEE International Symposium on Defect and Fault-Tolerance in VLSI …, 2007 | 217 | 2007 |
ReSP: a nonintrusive transaction-level reflective MPSoC simulation platform for design space exploration G Beltrame, L Fossati, D Sciuto IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2009 | 135 | 2009 |
Combined DVFS and mapping exploration for lifetime and soft-error susceptibility improvement in MPSoCs A Das, A Kumar, B Veeravalli, C Bolchini, A Miele 2014 Design, Automation & Test in Europe Conference & Exhibition (DATE), 1-6, 2014 | 100 | 2014 |
A novel design methodology for implementing reliability-aware systems on SRAM-based FPGAs C Bolchini, A Miele, C Sandionigi Computers, IEEE Transactions on 60 (12), 1744-1758, 2011 | 98 | 2011 |
And what can context do for data? C Bolchini, CA Curino, G Orsi, E Quintarelli, R Rosalba, SA Fabio, ... Communications of the ACM 52 (11), 136-140, 2009 | 95 | 2009 |
Reliability-driven system-level synthesis for mixed-critical embedded systems C Bolchini, A Miele IEEE Transactions on Computers 62 (12), 2489-2502, 2012 | 84 | 2012 |
Carve: Context-aware automatic view definition over relational databases C Bolchini, E Quintarelli, L Tanca Information Systems, 2012 | 82 | 2012 |
A software methodology for detecting hardware faults in VLIW data paths C Bolchini IEEE Transactions on Reliability 52 (4), 458-468, 2003 | 82 | 2003 |
Context information for knowledge reshaping C Bolchini, CA Curino, E Quintarelli, FA Schreiber, L Tanca International Journal of Web Engineering and Technology 5 (1), 88-103, 2009 | 80 | 2009 |
A methodology for a very small data base design C Bolchini, FA Schreiber, L Tanca Information Systems 32 (1), 61-82, 2007 | 78 | 2007 |
Context integration for mobile data tailoring C Bolchini, C Curino, FA Schreiber, L Tanca 7th International Conference on Mobile Data Management (MDM'06), 5-5, 2006 | 76 | 2006 |
Logical and physical design issues for smart card databases C Bolchini, F Salice, FA Schreiber, L Tanca ACM Transactions on Information Systems (TOIS) 21 (3), 254-285, 2003 | 70 | 2003 |
Design of VHDL-based totally self-checking finite-state machine and data-path descriptions C Bolchini, R Montandon, F Salice, D Sciuto IEEE Transactions on very large scale integration (VLSI) systems 8 (1), 98-103, 2000 | 65 | 2000 |
SEU mitigation for SRAM-based FPGAs through dynamic partial reconfiguration C Bolchini, D Quarta, MD Santambrogio Proceedings of the 17th ACM Great Lakes symposium on VLSI, 55-60, 2007 | 57 | 2007 |
Run-time mapping for reliable many-cores based on energy/performance trade-offs C Bolchini, M Carminati, A Miele, A Das, A Kumar, B Veeravalli 2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and …, 2013 | 50 | 2013 |
Automated resource-aware floorplanning of reconfigurable areas in partially-reconfigurable FPGA systems C Bolchini, A Miele, C Sandionigi 2011 21st International Conference on Field Programmable Logic and …, 2011 | 49 | 2011 |
Context Modeling and Context Awareness: steps forward in the Context− ADDICT project C Bolchini, G Orsi, E Quintarelli, F Schreiber, L Tanca IEEE Data Engineering Bulletin 34 (2), 2011 | 49 | 2011 |
Smart buildings: A monitoring and data analysis methodological framework C Bolchini, A Geronazzo, E Quintarelli Building and environment 121, 93-105, 2017 | 45 | 2017 |
Fault classification for SRAM-based FPGAs in the space environment for fault mitigation C Bolchini, C Sandionigi IEEE Embedded Systems Letters 2 (4), 107-110, 2010 | 44 | 2010 |