Cryo-CMOS circuits and systems for quantum computing applications B Patra, RM Incandela, JPG Van Dijk, HAR Homulle, L Song, ... IEEE Journal of Solid-State Circuits 53 (1), 309-321, 2017 | 422 | 2017 |
Cryo-CMOS for quantum computing E Charbon, F Sebastiano, A Vladimirescu, H Homulle, S Visser, L Song, ... 2016 IEEE International Electron Devices Meeting (IEDM), 13.5. 1-13.5. 4, 2016 | 216 | 2016 |
Characterization and compact modeling of nanometer CMOS transistors at deep-cryogenic temperatures RM Incandela, L Song, H Homulle, E Charbon, A Vladimirescu, ... IEEE Journal of the Electron Devices Society 6, 996-1006, 2018 | 204 | 2018 |
15.5 cryo-CMOS circuits and systems for scalable quantum computing E Charbon, F Sebastiano, M Babaie, A Vladimirescu, M Shahmohammadi, ... 2017 IEEE International Solid-State Circuits Conference (ISSCC), 264-265, 2017 | 73 | 2017 |
Cryo-CMOS electronic control for scalable quantum computing F Sebastiano, H Homulle, B Patra, R Incandela, J van Dijk, L Song, ... Proceedings of the 54th Annual Design Automation Conference 2017, 1-6, 2017 | 69 | 2017 |
Nanometer CMOS characterization and compact modeling at deep-cryogenic temperatures RM Incandela, L Song, HAR Homulle, F Sebastiano, E Charbon, ... 2017 47th European Solid-State Device Research Conference (ESSDERC), 58-61, 2017 | 37 | 2017 |
Cryogenic CMOS interfaces for quantum devices F Sebastiano, HAR Homulle, JPG van Dijk, RM Incandela, B Patra, ... 2017 7th IEEE International Workshop on Advances in Sensors and Interfaces …, 2017 | 24 | 2017 |
A compact and PVT-robust segmented duty-cycled resistor realizing TΩ impedances for neural recording interface circuits C Livanelioglu, W Choi, D Kim, J Liao, R Incandela, T Jang IEEE Solid-State Circuits Letters 6, 25-28, 2023 | 6 | 2023 |
An impedance-boosted switched-capacitor low-noise amplifier achieving 0.4 NEF G Atzeni, R Incandela, Y Ji, A Novello, H Ghiasi, G Cristiano, J Liao, ... 2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and …, 2022 | 3 | 2022 |
A 0.0014 mm2, 1.18 TΩ Segmented Duty-Cycled Resistor Replacing Pseudo-Resistor for Neural Recording Interface Circuits C Livanelioglu, W Choi, D Kim, J Liao, R Incandela, G Cristiano, T Jang 2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and …, 2022 | 2 | 2022 |
A 1,024-Channel, 64-Interconnect, Capacitive Neural Interface Using a Cross-Coupled Microelectrode Array and 2-Dimensional Code-Division Multiplexing W Choi, Y Chen, D Kim, S Weaver, T Schlotter, C Livanelioglu, J Liao, ... 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and …, 2023 | | 2023 |
Cryogenic CMOS LNA for RF readout of spin qubits RM Incandela | | 2016 |