| An implementation of the SANE Virtual Processor using POSIX threads MW van Tol, CR Jesshope, M Lankamp, S Polstra Journal of Systems Architecture 55 (3), 162-169, 2009 | 33 | 2009 |
| Efficient memory copy operations on the 48-core intel scc processor MW Van Tol, R Bakker, M Verstraaten, C Grelck, CR Jesshope 3rd Many-core Applications Research Community (MARC) Symposium 7598, 2011 | 30 | 2011 |
| A general model of concurrency and its implementation as many-core dynamic RISC processors T Bernard, K Bousias, L Guang, CR Jesshope, M Lankamp, MW van Tol, ... 2008 International Conference on Embedded Computer Systems: Architectures …, 2008 | 27 | 2008 |
| Apple-CORE: Microgrids of SVP Cores--Flexible, General-Purpose, Fine-Grained Hardware Concurrency Management R Poss, M Lankamp, Q Yang, J Fu, MW van Tol, C Jesshope 2012 15th Euromicro Conference on Digital System Design, 501-508, 2012 | 21 | 2012 |
| High level simulation of SVP many-core systems MI UDDIN, MW van Tol, CR Jesshope Parallel Processing Letters 21 (04), 413-438, 2011 | 16 | 2011 |
| An architecture and protocol for the management of resources in ubiquitous and heterogeneous systems based on the svp model of concurrency C Jesshope, JM Philippe, M van Tol Embedded Computer Systems: Architectures, Modeling, and Simulation: 8th …, 2008 | 15 | 2008 |
| Collecting signatures to model latency tolerance in high-level simulations of microthreaded cores MI Uddin, CR Jesshope, MW van Tol, R Poss Proceedings of the 2012 Workshop on Rapid Simulation and Performance …, 2012 | 14 | 2012 |
| Towards scalable I/O on a many-core architecture MA Hicks, MW van Tol, CR Jesshope 2010 International Conference on Embedded Computer Systems: Architectures …, 2010 | 13 | 2010 |
| Apple-CORE: harnessing general-purpose many-cores with hardware concurrency management R Poss, M Lankamp, Q Yang, J Fu, MW van Tol, I Uddin, C Jesshope Microprocessors and Microsystems 37 (8), 1090-1101, 2013 | 11 | 2013 |
| Extending and implementing the self-adaptive virtual processor for distributed memory architectures MW van Tol, J Koivisto arXiv preprint arXiv:1104.3876, 2011 | 9 | 2011 |
| Emulating asymmetric mpsocs on the intel scc many-core processor R Bakker, MW van Tol, AD Pimentel 2014 22nd Euromicro International Conference on Parallel, Distributed, and …, 2014 | 8 | 2014 |
| On mapping distributed s-net to the 48-core intel SCC processor M Verstraaten, C Grelck, MW van Tol, R Bakker, CR Jesshope 3rd MARC Symposium, Fraunhofer IOSB, Ettlingen, Germany, 2011 | 8 | 2011 |
| A characterization of the SPARC T3-4 system MW van Tol arXiv preprint arXiv:1106.2992, 2011 | 6 | 2011 |
| A framework for self-adaptive collaborative computing on reconfigurable platforms MW van Tol, Z Pohl, M Tichy Applications, Tools and Techniques on the Road to Exascale Computing, 579-586, 2012 | 4 | 2012 |
| On the construction of operating systems for the Microgrid many-core architecture MW van Tol | 2 | 2013 |
| Experiences in porting the SVP concurrency model to the 48-core Intel SCC using dedicated copy cores R Bakker, MW van Tol Proceedings of the 4th Many-core Applications Research Community (MARC …, 2012 | 2 | 2012 |
| An operating system strategy for general-purpose parallel computing on many-core architectures MW van Tol, CR Jesshope High Performance Computing: From Grids and Clouds to Exascale, 157-181, 2011 | 2 | 2011 |
| Advances in Computer Architecture 2013 Lab Assignment R Bakker, M Lankamp, R Douma, MW van Tol | | 2013 |
| Collecting signatures to model latency tolerance in high-level simulations of microthreaded cores M Irfan Uddin, CR Jesshope, MW van Tol, R Poss New YorkACM, 2012 | | 2012 |
| SVP model reference C Jesshope, M Lankamp, MW van Tol, TAM Bernard, R Poss | | 2009 |
Raphael ‘kena’ PossThaumogen在 thaumogen.net 的电子邮件经过验证
Raphael ‘kena’ PossThaumogen在 thaumogen.net 的电子邮件经过验证