A time-efficient CMOS-memristive programmable circuit realizing logic functions in generalized AND–XOR structures MJ Aljafar, MA Perkowski, JM Acken, R Tan IEEE Transactions on Very Large Scale Integration (VLSI) Systems 26 (1), 23-36, 2017 | 18 | 2017 |
Memristor-based volistor gates compute logic with low power consumption M Aljafar, P Long, M Perkowski BioNanoScience 6, 214-234, 2016 | 9 | 2016 |
Volistor Logic Gates in Crossbar Arrays of Rectifying Memristors. MJ Aljafar, MA Perkowski, JM Acken Int. J. Unconv. Comput. 14 (3-4), 319-348, 2019 | 5 | 2019 |
Survey on the benefits of using memristors for PUFs MJ Aljafar, JM Acken International Journal of Parallel, Emergent and Distributed Systems 37 (1 …, 2022 | 4 | 2022 |
A 3-D Crossbar Architecture for Both Pipeline and Parallel Computations MJ Aljafar, JM Acken IEEE Transactions on Circuits and Systems I: Regular Papers 68 (11), 4456-4469, 2021 | 3 | 2021 |
Leveraging layout-based effects for locking analog ICs MJ Aljafar, F Azaïs, ML Flottes, S Pagliarini Proceedings of the 2022 Workshop on Attacks and Solutions in Hardware …, 2022 | 2 | 2022 |
An Overview of FPGA-inspired Obfuscation Techniques ZU Abideen, S Gokulanathan, M J. Aljafar, S Pagliarini ACM Computing Surveys, 2023 | 1 | 2023 |
Multi-input volistor logic XNOR gates MJ Aljafar, MA Perkowski, JM Acken International Journal of Parallel, Emergent and Distributed Systems 35 (4 …, 2020 | 1 | 2020 |
New Approaches for Memristive Logic Computations MJ Aljafar Portland State University, 2018 | 1 | 2018 |
SCALLER: Standard Cell Assembled and Local Layout Effect-based Ring Oscillators MJ Aljafar, ZU Abideen, A Peetermans, B Gierlichs, S Pagliarini arXiv preprint arXiv:2406.01258, 2024 | | 2024 |
Utilizing layout effects for analog logic locking MJ Aljafar, F Azais, ML Flottes, S Pagliarini Journal of Cryptographic Engineering, 1-14, 2024 | | 2024 |
A 3D Memristor Architecture for In-Memory Computing Demonstrated with SHA3 MJ Aljafar, R Joshi, JM Acken arXiv preprint arXiv:2402.09545, 2024 | | 2024 |