Low-voltage low-power fast-settling CMOS operational transconductance amplifiers for switched-capacitor applications M Yavari, O Shoaei IEE Proceedings-Circuits, Devices and Systems 151 (6), 573-578, 2004 | 80 | 2004 |
Energy‐efficient high‐accuracy switching method for SAR ADCs E Rahimi, M Yavari Electronics Letters 50 (7), 499-501, 2014 | 73 | 2014 |
Hybrid cascode compensation for two-stage CMOS opamps M Yavari IEICE transactions on electronics 88 (6), 1161-1165, 2005 | 50 | 2005 |
A single-stage operational amplifier with enhanced transconductance and slew rate for switched-capacitor circuits M Yavari, T Moosazadeh Analog Integrated Circuits and Signal Processing 79, 589-598, 2014 | 49 | 2014 |
Digital blind background calibration of imperfections in time-interleaved ADCs H Mafi, M Yargholi, M Yavari IEEE Transactions on Circuits and Systems I: Regular Papers 64 (6), 1504-1514, 2017 | 47 | 2017 |
An accurate analysis of slew rate for two-stage CMOS opamps M Yavari, N Maghari, O Shoaei IEEE Transactions on Circuits and Systems II: Express Briefs 52 (3), 164-167, 2005 | 42 | 2005 |
Single-stage class AB operational amplifier for SC circuits M Yavari Electronics letters 46 (14), 977-979, 2010 | 39 | 2010 |
An energy-efficient DAC switching method for SAR ADCs T Yousefi, A Dabbaghian, M Yavari IEEE Transactions on Circuits and Systems II: Express Briefs 65 (1), 41-45, 2017 | 38 | 2017 |
A UWB CMOS low-noise amplifier with noise reduction and linearity improvement techniques B Mazhab Jafari, M Yavari Microelectronics Journal, 2015 | 38 | 2015 |
Hybrid cascode compensation for two-stage CMOS operational amplifiers M Yavari, O Shoaei, F Svelto 2005 IEEE International Symposium on Circuits and Systems, 1565-1568, 2005 | 38 | 2005 |
A 55–64-GHz low-power small-area LNA in 65-nm CMOS with 3.8-dB average NF and~ 12.8-dB power gain M Yaghoobi, M Yavari, MH Kashani, H Ghafoorifard, S Mirabbasi IEEE Microwave and Wireless Components Letters 29 (2), 128-130, 2019 | 35 | 2019 |
Equalization-based digital background calibration technique for pipelined ADCs B Zeinali, T Moosazadeh, M Yavari, A Rodriguez-Vazquez IEEE Transactions on Very Large Scale Integration (VLSI) Systems 22 (2), 322-333, 2013 | 34 | 2013 |
Digital Calibration of Amplifier Finite DC Gain and Gain Bandwidth in MASHModulators A Bafandeh, M Yavari IEEE Transactions on Circuits and Systems II: Express Briefs 63 (4), 321-325, 2015 | 28 | 2015 |
A noise-canceling CMOS LNA design for the upper band of UWB DS-CDMA receivers A Mirvakili, M Yavari 2009 IEEE International Symposium on Circuits and Systems, 217-220, 2009 | 27 | 2009 |
Using the Gate-Bulk Interaction and a Fundamental Current Injection to Attenuate IM3 and IM2 Currents in RF Transconductors M Asghari, M Yavari IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2015 | 25 | 2015 |
A 13 bit 10 MHz bandwidth MASH 3–2 Σ∆ modulator in 90 nm CMOS Z Sohrabi, M Yavari International Journal of Circuit Theory and Applications 41 (11), 1136-1153, 2013 | 24 | 2013 |
Systematic and optimal design of CMOS two-stage opamps with hybrid cascode compensation M Yavari, O Shoaei, A Rodriguez-Vazquez Proceedings of the Design Automation & Test in Europe Conference 1, 6 pp., 2006 | 24 | 2006 |
A wideband high linearity and low-noise CMOS active mixer using the derivative superposition and noise cancellation techniques P Solati, M Yavari Circuits, Systems, and Signal Processing 38, 2910-2930, 2019 | 23 | 2019 |
Very low-voltage, low-power and fast-settling OTA for switched-capacitor applications M Yavari, O Shoaei The 14th International Conference on Microelectronics,, 10-13, 2002 | 23 | 2002 |
Digital background calibration with histogram of decision points in pipelined ADCs P Gholami, M Yavari IEEE Transactions on Circuits and Systems II: Express Briefs 65 (1), 16-20, 2017 | 21 | 2017 |