| A 90 nm CMOS DSP MLSD transceiver with integrated AFE for electronic dispersion compensation of multimode optical fibers at 10 Gb/s OE Agazzi, MR Hueda, DE Crivelli, HS Carrer, A Nazemi, G Luna, ... IEEE Journal of Solid-State Circuits 43 (12), 2939-2957, 2008 | 122 | 2008 |
| 3.2 A 320mW 32Gb/s 8b ADC-based PAM-4 analog front-end with programmable gain control and analog peaking in 28nm CMOS D Cui, H Zhang, N Huang, A Nazemi, B Catli, HG Rhew, B Zhang, ... 2016 IEEE International Solid-State Circuits Conference (ISSCC), 58-59, 2016 | 93 | 2016 |
| 29.2 A transmitter and receiver for 100Gb/s coherent networks with integrated 4× 64GS/s 8b ADCs and DACs in 20nm CMOS J Cao, D Cui, A Nazemi, T He, G Li, B Catli, M Khanpour, K Hu, T Ali, ... 2017 IEEE International Solid-State Circuits Conference (ISSCC), 484-485, 2017 | 82 | 2017 |
| A 10.3 GS/s 6bit (5.1 ENOB at Nyquist) time-interleaved/pipelined ADC using open-loop amplifiers and digital calibration in 90nm CMOS A Nazemi, C Grace, L Lewyn, B Kobeissy, O Agazzi, P Voois, C Abidin, ... 2008 IEEE Symposium on VLSI Circuits, 18-19, 2008 | 81 | 2008 |
| 3.4 A 36Gb/s PAM4 transmitter using an 8b 18GS/S DAC in 28nm CMOS A Nazemi, K Hu, B Catli, D Cui, U Singh, T He, Z Huang, B Zhang, ... 2015 IEEE International Solid-State Circuits Conference-(ISSCC) Digest of …, 2015 | 77 | 2015 |
| An 8.5–11.5-Gbps SONET transceiver with referenceless frequency acquisition N Kocaman, S Fallahi, M Kargar, M Khanpour, A Nazemi, U Singh, ... IEEE journal of solid-state circuits 48 (8), 1875-1884, 2013 | 59 | 2013 |
| A 195mW/55mW dual-path receiver AFE for multistandard 8.5-to-11.5 Gb/s serial links in 40nm CMOS B Zhang, A Nazemi, A Garg, N Kocaman, MR Ahmadi, M Khanpour, ... 2013 IEEE International Solid-State Circuits Conference Digest of Technical …, 2013 | 41 | 2013 |
| A sub-200 fs RMS jitter capacitor multiplier loop filter-based PLL in 28 nm CMOS for high-speed serial communication applications B Çatlı, A Nazemi, T Ali, S Fallahi, Y Liu, J Kim, M Abdul-Latif, MR Ahmadi, ... Proceedings of the IEEE 2013 Custom Integrated Circuits Conference, 1-4, 2013 | 32 | 2013 |
| A dual-channel 23-Gbps CMOS transmitter/receiver chipset for 40-Gbps RZ-DQPSK and CS-RZ-DQPSK optical transmission D Cui, B Raghavan, U Singh, A Vasani, Z Huang, D Pi, M Khanpour, ... IEEE journal of solid-state circuits 47 (12), 3249-3260, 2012 | 30 | 2012 |
| Analog-to-digital converter A Nazemi, G Asmanis, GCA Luna, M Kargar, C Grace, S Ramprasad US Patent 8,094,056, 2012 | 23 | 2012 |
| A 40 nm CMOS 195 mW/55 mW dual-path receiver AFE for multi-standard 8.5–11.5 Gb/s serial links B Zhang, A Nazemi, A Garg, N Kocaman, MR Ahmadi, M Khanpour, ... IEEE Journal of Solid-State Circuits 50 (2), 426-439, 2014 | 21 | 2014 |
| High-speed, low-power reconfigurable voltage-mode DAC-driver AJ Vasani, A Nazemi, J Cao, A Momtaz US Patent 9,413,381, 2016 | 19 | 2016 |
| Analog-to-digital converter A Nazemi US Patent 7,808,417, 2010 | 17 | 2010 |
| A 2.8 mW/Gb/s quad-channel 8.5–11.4 Gb/s quasi-digital transceiver in 28 nm CMOS A Nazemi, H Maarefi, B Çatlı, MR Ahmadi, S Fallahi, T Ali, M Abdul-Latif, ... 2013 Symposium on VLSI Circuits, C276-C277, 2013 | 12 | 2013 |
| Compact low-power fully digital CMOS clock generation apparatus for high-speed SerDes MR Ahmadi, S Fallahi, ALI Tamer, A Nazemi, H Maarefi, B Catli, A Momtaz US Patent 9,001,869, 2015 | 11 | 2015 |
| 6.1 A 112Gb/s serial link transceiver with 3-tap FFE and 18-tap DFE receiver for up to 43dB insertion loss channel in 7nm FinFET technology B Zhang, A Vasani, A Sinha, A Nilchi, H Tong, L Rao, K Khanoyan, ... 2023 IEEE International Solid-State Circuits Conference (ISSCC), 5-7, 2023 | 9 | 2023 |
| A dual 23Gb/s CMOS transmitter/receiver chipset for 40Gb/s RZ-DQPSK and CS-RZ-DQPSK optical transmission D Cui, B Raghavan, U Singh, A Vasani, Z Huang, D Pi, M Khanpour, ... 2012 IEEE International Solid-State Circuits Conference, 330-332, 2012 | 9 | 2012 |
| Time-interleaved high-speed digital-to-analog converter (DAC) architecture with spur calibration A Garg, A Nazemi, AJ Vasani, HG Rhew, J Zhang, J Cao, MH Nazari, ... US Patent 9,685,969, 2017 | 8 | 2017 |
| Compact high-speed mixed-signal interface B Catli, A Nazemi, MR Ahmadi, U Singh, J Cao, A Momtaz US Patent 8,618,835, 2013 | 8 | 2013 |
| Multiplexer circuit for a digital to analog converter J Zhang, A Garg, A Nazemi, J Cao US Patent 10,069,508, 2018 | 7 | 2018 |
