| Reconfigurable hardware for machine learning applications VS Vranjković, RJR Struharik, LA Novak Journal of Circuits, Systems and Computers 24 (05), 1550064, 2015 | 25 | 2015 |
| New architecture for SVM classifier and its application to telecommunication problems V Vranjković, R Struharik 2011 19thTelecommunications Forum (TELFOR) Proceedings of Papers, 1543-1545, 2011 | 19 | 2011 |
| Inducing oblique decision trees R Struharik, V Vranjković, S Dautović, L Novak 2014 IEEE 12th International Symposium on Intelligent Systems and …, 2014 | 14 | 2014 |
| Coarse-grained reconfigurable hardware accelerator of machine learning classifiers V Vranjković, R Struharik 2016 International conference on systems, signals and image processing …, 2016 | 11 | 2016 |
| Hardware acceleration of homogeneous and heterogeneous ensemble classifiers VS Vranjković, RJR Struharik, LA Novak Microprocessors and Microsystems 39 (8), 782-795, 2015 | 8 | 2015 |
| Reducing off-chip memory traffic in deep CNNs using stick buffer cache D Rakanovic, A Erdeljan, V Vranjkovic, B Vukobratovic, P Teodorovic, ... 2017 25th Telecommunication Forum (TELFOR), 1-4, 2017 | 5 | 2017 |
| Argus CNN accelerator based on kernel clustering and resource-aware pruning DM Rakanovic, V Vranjkovic, RJR Struharik Elektronika ir Elektrotechnika 27 (3), 57-70, 2021 | 3 | 2021 |
| Universal Reconfigurable Hardware Accelerator for Sparse Machine Learning Predictive Models V Vranjkovic, P Teodorovic, R Struharik Electronics 11 (8), 1178, 2022 | 2 | 2022 |
| Hardware acceleration of sparse support vector machines for edge computing V Vranjkovic, R Struharik Elektronika ir Elektrotechnika 26 (3), 42-53, 2020 | 2 | 2020 |
| Stick buffer cache v2: Improved input feature map cache for reducing off-chip memory traffic in CNN accelerators R Struharik, V Vranjkovic 2019 27th Telecommunications Forum (TELFOR), 1-4, 2019 | 2 | 2019 |
| Ip cores for hardware evolution of decision trees R Struharik, V Vranjkovic, B Vukobratovic 2012 IEEE 10th Jubilee International Symposium on Intelligent Systems and …, 2012 | 2 | 2012 |
| Puppis: Hardware Accelerator of Single-Shot Multibox Detectors for Edge-Based Applications V Vrbaski, S Josic, V Vranjkovic, P Teodorovic, R Struharik Electronics 12 (22), 4557, 2023 | 1 | 2023 |
| IMPLEMENTACIJA PODSISTEMA SKRIVENE MEMROIJE ZA RISC-V PROCESOR Đ Mišeljić, V Vranjkovic Zbornik radova Fakulteta tehničkih nauka u Novom Sadu 35 (11), 2030-2033, 2020 | | 2020 |
| Striping input feature map cache for reducing off-chip memory traffic in CNN accelerators R Struharik, V Vranjković Telfor Journal 12 (2), 116-121, 2020 | | 2020 |
| DIZAJN I VERIFIKACIJA DLX PROCESORA DESIGN AND VERIFICATION OF DLX CPU V Vranjković, R Struharik | | |
Rastislav StruharikProfessor, University of Novi Sad在 uns.ac.rs 的电子邮件经过验证
Rastislav StruharikProfessor, University of Novi Sad在 uns.ac.rs 的电子邮件经过验证
STANISA DAUTOVICAssociate Professor of Electrical Engineering, University of Novi Sad在 uns.ac.rs 的电子邮件经过验证