Save: Sparsity-aware vector engine for accelerating dnn training and inference on cpus Z Gong, H Ji, CW Fletcher, CJ Hughes, S Baghsorkhi, J Torrellas 2020 53rd Annual IEEE/ACM International Symposium on Microarchitecture …, 2020 | 41 | 2020 |
An empirical study of the effect of source-level loop transformations on compiler stability Z Gong, Z Chen, J Szaday, D Wong, Z Sura, N Watkinson, S Maleki, ... Proceedings of the ACM on Programming Languages 2 (OOPSLA), 1-29, 2018 | 40 | 2018 |
Sparsetrain: Leveraging dynamic sparsity in software for training dnns on general-purpose simd processors Z Gong, H Ji, CW Fletcher, CJ Hughes, J Torrellas Proceedings of the ACM International Conference on Parallel Architectures …, 2020 | 39 | 2020 |
Graphite: optimizing graph neural networks on CPUs through cooperative software-hardware techniques Z Gong, H Ji, Y Yao, CW Fletcher, CJ Hughes, J Torrellas Proceedings of the 49th Annual International Symposium on Computer …, 2022 | 27 | 2022 |
Lore: A loop repository for the evaluation of compilers Z Chen, Z Gong, JJ Szaday, DC Wong, D Padua, A Nicolau, ... 2017 IEEE International Symposium on Workload Characterization (IISWC), 219-228, 2017 | 19 | 2017 |
Using hardware counters to predict vectorization N Watkinson, A Shivam, Z Chen, A Veidenbaum, A Nicolau, Z Gong Languages and Compilers for Parallel Computing: 30th International Workshop …, 2019 | 12 | 2019 |
Exploiting and coping with sparsity to accelerate DNNs on CPUs Z Gong University of Illinois at Urbana-Champaign, 2021 | | 2021 |