Side channels in the McEliece PKC F Strenzke, E Tews, HG Molter, R Overbeck, A Shoufan Post-Quantum Cryptography: Second International Workshop, PQCrypto 2008 …, 2008 | 117 | 2008 |
A timing attack against Patterson algorithm in the McEliece PKC A Shoufan, F Strenzke, HG Molter, M Stöttinger Information, Security and Cryptology–ICISC 2009: 12th International …, 2010 | 92 | 2010 |
A novel cryptoprocessor architecture for the McEliece public-key cryptosystem A Shoufan, T Wink, HG Molter, SA Huss, E Kohnert IEEE Transactions on Computers 59 (11), 1533-1546, 2010 | 47 | 2010 |
A simple power analysis attack on a McEliece cryptoprocessor HG Molter, M Stöttinger, A Shoufan, F Strenzke Journal of Cryptographic Engineering 1, 29-36, 2011 | 40 | 2011 |
SC-DEVS: An efficient SystemC extension for the DEVS model of computation F Madlener, HG Molter, SA Huss 2009 Design, Automation & Test in Europe Conference & Exhibition, 1518-1523, 2009 | 17 | 2009 |
A novel cryptoprocessor architecture for chained Merkle signature scheme A Shoufan, N Huber, HG Molter Microprocessors and Microsystems 35 (1), 34-47, 2011 | 14 | 2011 |
DEVS2VHDL: Automatic transformation of XML-specified DEVS Model of Computation into synthesizable VHDL code HG Molter, A Seffrin, SA Huss 2009 Forum on Specification & Design Languages (FDL), 1-6, 2009 | 14 | 2009 |
An efficient FPGA implementation for an DECT brute-force attacking scenario HG Molter, K Ogata, E Tews, RP Weinmann 2009 Fifth International Conference on Wireless and Mobile Communications, 82-86, 2009 | 14 | 2009 |
The devs model of computation a foundation for a novel embedded systems design methodology HG Molter, SA Huss The 2011 International Conference on Computer Engineering & Systems, xxi-xxvi, 2011 | 9 | 2011 |
A System Level Design Flow for Embedded Systems based on Model of Computation Mappings HG Molter, F Madlener, SA Huss IFAC Proceedings Volumes 42 (21), 30-35, 2009 | 7 | 2009 |
Discrete event system specification HG Molter, HG Molter SynDEVS Co-Design Flow: A Hardware/Software Co-Design Flow Based on the …, 2012 | 6 | 2012 |
Design methodologies for secure embedded systems A Biedermann, HG Molter Lecture Notes in Electrical Engineering, 2011 | 6 | 2011 |
A novel multiple core co-processor architecture for efficient server-based public key cryptographic applications R Laue, HG Molter, F Rieder, SA Huss, K Saxena 2008 IEEE Computer Society Annual Symposium on VLSI, 87-92, 2008 | 6 | 2008 |
Automated generation of embedded systems software from timed DEVS model of computation specifications HG Molter, J Kohlmann, SA Huss 2012 15th Euromicro Conference on Digital System Design, 700-707, 2012 | 5 | 2012 |
State space optimization within the DEVS model of computation for timing efficiency HG Molter, A Seffrin, SA Huss 2011 IEEE/IFIP 19th International Conference on VLSI and System-on-Chip, 422-427, 2011 | 5 | 2011 |
SynDEVS Co-Design Flow: A Hardware/Software Co-Design Flow Based on the Discrete Event System Specification Model of Computation HG Molter Springer Science & Business Media, 2012 | 4 | 2012 |
Side channels in the McEliece PKC HG Molter, R Overbeck, A Shoufan, F Strenzke, E Tews The Second international Workshop on Post-Quantum Cryptography PQCRYPTO, 2008 | 4 | 2008 |
Method for operating a security gateway of a communication system for vehicles HG Molter, S Kruber US Patent 10,057,292, 2018 | 3 | 2018 |
Delivery device for delivering oil from a reservoir to a transmission of a motor vehicle J Hechler, HG Molter US Patent App. 14/899,421, 2016 | 3 | 2016 |
Graphical User Interface HG Molter, HG Molter SynDEVS Co-Design Flow: A Hardware/Software Co-Design Flow Based on the …, 2012 | 2 | 2012 |