| Graphics processors and graphics processing units having dot product accumulate instruction for hybrid floating point format S Maiyuran, S Marwaha, A Garg, S Pal, J Parra, C Gurram, V George, ... US Patent 11,361,496, 2022 | 28 | 2022 |
| Graphics processors and graphics processing units having dot product accumulate instruction for hybrid floating point format S Maiyuran, S Marwaha, A Garg, S Pal, J Parra, C Gurram, V George, ... US Patent 11,709,793, 2023 | 17 | 2023 |
| Deep learning implementations using systolic arrays and fused operations W Rash, S Maiyuran, V George, BL Toll, R Sankaran, RS Chappell, S Pal, ... US Patent App. 16/582,433, 2021 | 15 | 2021 |
| Synchronization utilizing local team barriers for thread team processing B George, S Pal, J Valerio, V Ranganathan, F Fu, MEI Chunhui US Patent App. 17/958,213, 2024 | 9 | 2024 |
| Control flow mechanism for execution of graphics processor instructions using active channel packing SM Maiyuran, GY Lueh, S Pal, G Chen, AV Kommaraju, J Chandra, ... US Patent 10,990,409, 2021 | 9 | 2021 |
| Hierarchical general register file (GRF) for execution block AR Appu, A Koker, J Ray, K Sinha, KC Veernapu, S Maiyuran, P Surti, ... US Patent 10,423,415, 2019 | 9 | 2019 |
| Dynamic thread splitting having multiple instruction pointers for the same thread HC Nalluri, S Pal, S Maiyuran, J Chandra US Patent 10,789,071, 2020 | 8 | 2020 |
| A comparative study on physico-chemical characteristics and Zooplankton diversities between natural and man-made Wetlands at Cooch Behar, West Bengal, India S Pal, D Das, K Chakraborty European Journal of Experimental Biology 5 (5), 85-97, 2015 | 8 | 2015 |
| Accumulator pooling mechanism GY Lueh, S Maiyuran, WY Chen, K Trifunovic, S Pal, CS Gurram, JE Parra, ... US Patent 10,839,478, 2020 | 5 | 2020 |
| Software scoreboard information and synchronization S Maiyuran, S Pal, JE Parra, CS Gurram, AJ Shivani, A Garg, BA Schwartz, ... US Patent 10,360,654, 2019 | 5 | 2019 |
| Scalable sparse matrix multiply acceleration using systolic arrays with feedback inputs S Maiyuran, J Parra, S Pal, A Garg, S Marwaha, C Gurram, D Starkey, ... US Patent 11,204,977, 2021 | 4 | 2021 |
| Computing efficient cross channel operations in parallel computing machines using systolic arrays S Maiyuran, J Parra, S Pal, C Gurram US Patent 11,182,337, 2021 | 4 | 2021 |
| Sparse matrix optimization mechanism N Sharma, S Pal, BP Simon, TD Vivek US Patent 11,127,108, 2021 | 4 | 2021 |
| Recompiling GPU code based on spill/fill instructions and number of stall cycles PJ Ashar, S Pal, S Maiyuran, WY Chen, GY Lueh US Patent 10,698,689, 2020 | 4 | 2020 |
| Instruction that performs a scatter write WY Chen, GY Lueh, S Maiyuran, S Pal US Patent 9,880,839, 2018 | 4 | 2018 |
| Studies on the length-weight relationship of fish from the river Ghargharia at Cooch Behar, West Bengal, India S Pal, S Debnath, K Chakraborty International Research Journal of Biological Sciences 7 (5), 7-12, 2018 | 3 | 2018 |
| Computing efficient cross channel operations in parallel computing machines using systolic arrays S Maiyuran, J Parra, S Pal, C Gurram US Patent 11,669,490, 2023 | 2 | 2023 |
| Systolic array of arbitrary physical and logical depth J Parra, W Chen, K Chen, V George, J Gu, C Gurram, G Lueh, S Junkins, ... US Patent App. 17/304,678, 2022 | 2 | 2022 |
| Supporting 8-bit floating point format operands in a computing architecture N Mellempudi, S Maiyuran, V George, F Fu, S Mu, S Pal, W Xiong US Patent App. 17/212,588, 2022 | 2 | 2022 |
| Graphics processors and graphics processing units having dot product accumulate instruction for hybrid floating point format S Maiyuran, S Marwaha, A Garg, S Pal, J Parra, C Gurram, V George, ... US Patent 11,954,063, 2024 | 1 | 2024 |
