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| Three-dimensional 4F2ReRAM cell with CMOS logic compatible process CH Wang, YH Tsai, KC Lin, MF Chang, YC King, CJ Lin, SS Sheu, ... 2010 International Electron Devices Meeting, 29.6. 1-29.6. 4, 2010 | 87 | 2010 |
| Three-DimensionalReRAM With Vertical BJT Driver by CMOS Logic Compatible Process CH Wang, YH Tsai, KC Lin, MF Chang, YC King, CJ Lin, SS Sheu, ... IEEE Transactions on Electron Devices 58 (8), 2466-2472, 2011 | 51 | 2011 |
| 3D Monolithic Stacked 1T1R cells using Monolayer MoS2 FET and hBN RRAM Fabricated at Low (150°C) Temperature CH Wang, C McClellan, Y Shi, X Zheng, V Chen, M Lanza, E Pop, ... 2018 IEEE International Electron Devices Meeting (IEDM), 22.5. 1-22.5. 4, 2018 | 49 | 2018 |
| Vertical and lateral copper transport through graphene layers L Li, X Chen, CH Wang, J Cao, S Lee, A Tang, C Ahn, S Singha Roy, ... ACS nano 9 (8), 8361-8367, 2015 | 49 | 2015 |
| Unipolar n-type black phosphorus transistors with low work function contacts CH Wang, JAC Incorvia, CJ McClellan, AC Yu, MJ Mleczko, E Pop, ... Nano letters 18 (5), 2822-2827, 2018 | 48 | 2018 |
| DRAM Retention at Cryogenic Temperatures F Wang, T Vogelsang, B Haukness, SC Magee 2018 IEEE International Memory Workshop (IMW), 1-4, 2018 | 39 | 2018 |
| Cu diffusion barrier: Graphene benchmarked to TaN for ultimate interconnect scaling L Li, X Chen, CH Wang, S Lee, J Cao, SS Roy, MS Arnold, HSP Wong 2015 Symposium on VLSI Technology (VLSI Technology), T122-T123, 2015 | 31 | 2015 |
| First Principles Study of Memory Selectors using Heterojunctions of 2D Layered Materials L Li, B Magyari-Köpe, CH Wang, S Deshmukh, Z Jiang, H Li, Y Yang, H Li, ... 2018 IEEE International Electron Devices Meeting (IEDM), 24.3. 1-24.3. 4, 2018 | 5 | 2018 |
| A novel high-density embedded AND-type split gate flash memory WC Shen, CH Wang, HW Pan, ZS Yang, Y Der Chih, TL Lee, CW Lien, ... Japanese Journal of Applied Physics 53 (4S), 04ED08, 2014 | 4 | 2014 |
| Magnetic wireless interlayer transmission through perpendicular MTJ for 3-D IC applications LS Chang, CH Wang, KY Dai, KH Shen, MJ Tsai, CJ Lin, YC King IEEE Transactions on Electron Devices 61 (7), 2480-2485, 2014 | 3 | 2014 |
| 3-Dimensional 4F2 ReRAM Cell with CMOS Logic Compatible Process CH Wang, YH Tsai, KC Lin, MF Chang, YC King, CJ Lin, SS Sheu, ... Electron Devices Meeting (IEDM), 2010 IEEE International, San Francisco, CA, 2010 | | 2010 |
