| HVD: horizontal-vertical-diagonal error detecting and correcting code to protect against with soft errors M Kishani, HR Zarandi, H Pedram, A Tajary, M Raji, B Ghavami Design Automation for Embedded Systems 15, 289-310, 2011 | 36 | 2011 |
| Printed Persian OCR system using deep learning M Rahmati, M Fateh, M Rezvani, A Tajary, V Abolghasemi IET Image Processing 14 (15), 3920-3931, 2020 | 13 | 2020 |
| Defect and variation issues on design mapping of reconfigurable nanoscale crossbars B Ghavami, A Tajary, M Raji, H Pedram 2010 IEEE Computer Society Annual Symposium on VLSI, 173-178, 2010 | 10 | 2010 |
| Persian printed text line detection based on font size A Fateh, M Rezvani, A Tajary, M Fateh Multimedia Tools and Applications 82 (2), 2393-2418, 2023 | 7 | 2023 |
| IRHT: An SDC detection and recovery architecture based on value locality of instruction binary codes A Tajary, HR Zarandi, N Bagherzadeh Microprocessors and Microsystems 77, 103159, 2020 | 5 | 2020 |
| Providing a voting-based method for combining deep neural network outputs to layout analysis of printed documents A Fateh, M Rezvani, A Tajary, M Fateh Journal of Machine Vision and Image Processing 9 (1), 47-64, 2022 | 4 | 2022 |
| High-level fault simulation methodology for QDI template-based asynchronous circuits B Ghavami, A Tajary, HR Zarandi TENCON 2009-2009 IEEE Region 10 Conference, 1-6, 2009 | 4 | 2009 |
| A routing-aware simulated annealing-based placement method in wireless network on chips AR Tajary, E Tahanian Journal of AI and Data Mining 8 (3), 409-415, 2020 | 3 | 2020 |
| A metallic CNT tolerant design methodology for carbon nanotube-based programmable gate arrays A Tajary, B Ghavami Journal of Circuits, Systems and Computers 25 (02), 1650016, 2016 | 3 | 2016 |
| Statistical leakage power optimization of asynchronous circuits considering process variations M Raji, A Tajary, B Ghavami, H Pedram, HR Zarandi Integrated Circuit and System Design. Power and Timing Modeling …, 2011 | 3 | 2011 |
| CPU-aware, process-level redundancy to tolerate faults in multi-core H Aliee, HR Zarandi, A Tajary 2011 International Conference on High Performance Computing & Simulation …, 2011 | 2 | 2011 |
| A Simulated Annealing-based Throughput-aware Task Mapping Algorithm for Manycore Processors AR Tajary, H Morshedlou Journal of AI and Data Mining 10 (3), 311-320, 2022 | 1 | 2022 |
| An Adaptive Routing Algorithm for Wireless Network on Chips A Tajary, E Tahanian Journal of Electrical and Computer Engineering Innovations (JECEI) 10 (2 …, 2022 | 1 | 2022 |
| Introducing a new routing algorithm for wireless networks on chip using reinforcement learning Z Harati, E Tahanian, A Tajary, M Fateh Jordanian Journal of Computers and Information Technology 7 (3), 2021 | 1 | 2021 |
| Scalable THz Network‐On‐Chip Architecture for Multichip Systems E Tahanian, A Tajary, M Rezvani, M Fateh Journal of Computer Networks and Communications 2020 (1), 8823938, 2020 | 1 | 2020 |
| Using instruction result locality and re-execution to mitigate silent data corruptions A Tajary, HR Zarandi Microelectronics Reliability 62, 178-190, 2016 | 1 | 2016 |
| An Efficient Soft Error Detection in Multicore Processors Running Server Applications A Tajary, HR Zarandi 2016 24th Euromicro International Conference on Parallel, Distributed, and …, 2016 | 1 | 2016 |
| Game-based congestion-aware routing algorithm in wireless network on chips E Tahanian, A Tajary, M Rezvani International Journal of Ad Hoc and Ubiquitous Computing 42 (4), 258-268, 2023 | | 2023 |
Hamid R. ZarandiAssociate Professor, Department of Computer Engineering, Amirkabir University of Technology在 aut.ac.ir 的电子邮件经过验证
