A 1.8-GHz low-phase-noise CMOS VCO using optimized hollow spiral inductors J Craninckx, MSJ Steyaert IEEE Journal of solid-state circuits 32 (5), 736-744, 1997 | 719 | 1997 |
A fully integrated CMOS DCS-1800 frequency synthesizer J Craninckx, MSJ Steyaert IEEE Journal of Solid-State Circuits 33 (12), 2054-2065, 1998 | 439 | 1998 |
A 65fJ/conversion-step 0-to-50MS/s 0-to-0.7 mW 9b charge-sharing SAR ADC in 90nm digital CMOS J Craninckx, G Van der Plas 2007 IEEE International Solid-State Circuits Conference. Digest of Technical …, 2007 | 395 | 2007 |
A 1.75-GHz/3-V dual-modulus divide-by-128/129 prescaler in 0.7-μm CMOS J Craninckx, MSJ Steyaert Solid-State Circuits, IEEE Journal of 31 (7), 890-897, 1996 | 364 | 1996 |
A 1.8-GHz CMOS low-phase-noise voltage-controlled oscillator with prescaler J Craninckx, MSJ Steyaert IEEE Journal of Solid-State Circuits 30 (12), 1474-1482, 1995 | 331 | 1995 |
Low-noise voltage-controlled oscillators using enhanced LC-tanks J Craninckx, M Steyaert IEEE Transactions on Circuits and Systems II: Analog and Digital Signal …, 1995 | 318 | 1995 |
Analog/RF solutions enabling compact full-duplex radios B Debaillie, DJ van den Broek, C Lavin, B van Liempd, EAM Klumperink, ... IEEE Journal on Selected Areas in Communications 32 (9), 1662-1673, 2014 | 314 | 2014 |
Wireless CMOS frequency synthesizer design J Craninckx, M Steyaert Kluwer Academic Pub, 1998 | 286* | 1998 |
An 820μW 9b 40MS/s noise-tolerant dynamic-SAR ADC in 90nm digital CMOS V Giannini, P Nuzzo, V Chironi, A Baschirotto, G Van der Plas, ... 2008 IEEE International Solid-State Circuits Conference-Digest of Technical …, 2008 | 283 | 2008 |
A 1.7 mW 11b 250MS/s 2× Interleaved Fully Dynamic Pipelined SAR ADC in 40nm Digital CMOS B Verbruggen, M Iriguchi, J Craninckx Proc. of IEEE Solid-State Circ. Conf.(ISSCC), 466-467, 2012 | 210* | 2012 |
A 40 nm CMOS 0.4–6 GHz receiver resilient to out-of-band blockers J Borremans, G Mandal, V Giannini, B Debaillie, M Ingels, T Sano, ... IEEE Journal of Solid-State Circuits 46 (7), 1659-1671, 2011 | 196 | 2011 |
Flexible baseband analog circuits for software-defined radio front-ends V Giannini, J Craninckx, S D'amico, A Baschirotto IEEE journal of solid-state circuits 42 (7), 1501-1512, 2007 | 177 | 2007 |
A 79-GHz 2 2 MIMO PMCW Radar SoC in 28-nm CMOS D Guermandi, Q Shi, A Dewilde, V Derudder, U Ahmad, A Spagnolo, ... IEEE Journal of Solid-State Circuits 52 (10), 2613-2626, 2017 | 168 | 2017 |
A 9.2–12.7 GHz wideband fractional-N subsampling PLL in 28 nm CMOS with 280 fs RMS jitter K Raczkowski, N Markulic, B Hershberg, J Craninckx IEEE Journal of Solid-State Circuits 50 (5), 1203-1213, 2015 | 155 | 2015 |
A 2-mm 0.1–5 GHz Software-Defined Radio Receiver in 45-nm Digital CMOS V Giannini, P Nuzzo, C Soens, K Vengattaramane, J Ryckaert, M Goffioul, ... Solid-State Circuits, IEEE Journal of 44 (12), 3486-3498, 2009 | 155 | 2009 |
A fully integrated spiral-LC CMOS VCO set with prescaler for GSM and DCS-1800 systems J Craninckx, M Steyaert, H Miyakawa Proceedings of CICC 97-Custom Integrated Circuits Conference, 403-406, 1997 | 147 | 1997 |
Wideband VCO with simultaneous switching of frequency band, active core, and varactor size D Hauspie, EC Park, J Craninckx IEEE Journal of Solid-State Circuits 42 (7), 1472-1480, 2007 | 143 | 2007 |
A fully-integrated single-chip SOC for Bluetooth FO Eynde, JJ Schmit, V Charlier, R Alexandre, C Sturman, K Coffin, ... 2001 IEEE International Solid-State Circuits Conference. Digest of Technical …, 2001 | 141 | 2001 |
An analytical model of planar inductors on lowly doped silicon substrates for high frequency analog design up to 3 GHz J Crols, P Kinget, J Craninckx, M Steyaert 1996 Symposium on VLSI Circuits. Digest of Technical Papers, 28-29, 1996 | 141 | 1996 |
A fully reconfigurable software-defined radio transceiver in 0.13μm CMOS J Craninckx, M Liu, D Hauspie, V Giannini, T Kim, J Lee, M Libois, ... Solid-State Circuits Conference, 2007. ISSCC 2007. Digest of Technical …, 2007 | 139 | 2007 |