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Michaela Blott
Michaela Blott
AMD Research
在 amd.com 的电子邮件经过验证
标题
引用次数
引用次数
年份
Finn: A framework for fast, scalable binarized neural network inference
Y Umuroglu, NJ Fraser, G Gambardella, M Blott, P Leong, M Jahre, ...
Proceedings of the 2017 ACM/SIGDA international symposium on field …, 2017
12062017
FINN-R An End-to-End Deep-Learning Framework for Fast Exploration of Quantized Neural Networks
M Blott, TB Preußer, NJ Fraser, G Gambardella, K O’brien, Y Umuroglu, ...
ACM Transactions on Reconfigurable Technology and Systems (TRETS) 11 (3), 1-23, 2018
3992018
Syq: Learning symmetric quantization for efficient deep neural networks
J Faraone, N Fraser, M Blott, PHW Leong
Proceedings of the IEEE Conference on Computer Vision and Pattern …, 2018
1532018
Synetgy: Algorithm-hardware co-design for convnet accelerators on embedded fpgas
Y Yang, Q Huang, B Wu, T Zhang, L Ma, G Gambardella, M Blott, ...
Proceedings of the 2019 ACM/SIGDA international symposium on field …, 2019
1362019
Achieving 10Gbps Line-rate Key-value Stores with {FPGAs}
M Blott, K Karras, L Liu, K Vissers, J Bär, Z István
5th USENIX Workshop on Hot Topics in Cloud Computing (HotCloud 13), 2013
1302013
A low-latency library in FPGA hardware for high-frequency trading (HFT)
JW Lockwood, A Gupte, N Mehta, M Blott, T English, K Vissers
2012 IEEE 20th annual symposium on high-performance interconnects, 9-16, 2012
1182012
Scalable 10Gbps TCP/IP stack architecture for reconfigurable hardware
D Sidler, G Alonso, M Blott, K Karras, K Vissers, R Carley
2015 IEEE 23rd Annual International Symposium on Field-Programmable Custom …, 2015
1122015
OSNT: Open source network tester
G Antichi, M Shahbaz, Y Geng, N Zilberman, A Covington, M Bruyere, ...
IEEE Network 28 (5), 6-12, 2014
1082014
LogicNets: Co-designed neural networks and circuits for extreme-throughput applications
Y Umuroglu, Y Akhauri, NJ Fraser, M Blott
2020 30th International Conference on Field-Programmable Logic and …, 2020
972020
FINN-L: Library extensions and design trade-off analysis for variable precision LSTM networks on FPGAs
V Rybalkin, A Pappalardo, MM Ghaffar, G Gambardella, N Wehn, M Blott
2018 28th international conference on field programmable logic and …, 2018
882018
A flexible hash table design for 10gbps key-value stores on fpgas
Z István, G Alonso, M Blott, K Vissers
2013 23rd International Conference on Field programmable Logic and …, 2013
792013
Scaling binarized neural networks on reconfigurable logic
NJ Fraser, Y Umuroglu, G Gambardella, M Blott, P Leong, M Jahre, ...
Proceedings of the 8th Workshop and 6th Workshop on Parallel Programming and …, 2017
732017
Applications and techniques for fast machine learning in science
AMC Deiana, N Tran, J Agar, M Blott, G Di Guglielmo, J Duarte, P Harris, ...
Frontiers in big Data 5, 787421, 2022
532022
Inference of quantized neural networks on heterogeneous all-programmable devices
TB Preußer, G Gambardella, N Fraser, M Blott
2018 Design, Automation & Test in Europe Conference & Exhibition (DATE), 833-838, 2018
532018
Architectural optimizations for high performance and energy efficient Smith-Waterman implementation on FPGAs using OpenCL
L Di Tucci, K O'Brien, M Blott, MD Santambrogio
Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017 …, 2017
522017
Circuits for and methods of controlling the operation of a hybrid memory system
M Blott, L Liu, KA Vissers
US Patent 9,711,194, 2017
462017
Efficient error-tolerant quantized neural network accelerators
G Gambardella, J Kappauf, M Blott, C Doehring, M Kumm, P Zipf, ...
2019 IEEE International Symposium on Defect and Fault Tolerance in VLSI and …, 2019
432019
Scaling Out to a {Single-Node} 80Gbps Memcached Server with 40Terabytes of Memory
M Blott, L Liu, K Karras, K Vissers
7th USENIX Workshop on Hot Topics in Storage and File Systems (HotStorage 15), 2015
432015
Benchmarking vision kernels and neural network inference accelerators on embedded platforms
M Qasaimeh, K Denolf, A Khodamoradi, M Blott, J Lo, L Halder, K Vissers, ...
Journal of Systems Architecture 113, 101896, 2021
412021
Dataflow architectures for 10gbps line-rate key-value-stores
M Blott, K Vissers
2013 IEEE Hot Chips 25 Symposium (HCS), 1-25, 2013
412013
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