| LNPU: A 25.3 TFLOPS/W sparse deep-neural-network learning processor with fine-grained mixed precision of FP8-FP16 J Lee, J Lee, D Han, J Lee, G Park, HJ Yoo 2019 IEEE International Solid-State Circuits Conference-(ISSCC), 142-144, 2019 | 171 | 2019 |
| HNPU: An Adaptive DNN Training Processor Utilizing Stochastic Dynamic Fixed-Point and Active Bit-Precision Searching D Han, D Im, G Park, Y Kim, S Song, J Lee, HJ Yoo IEEE Journal of Solid-State Circuits 56 (9), 2858-2869, 2021 | 57 | 2021 |
| An energy-efficient sparse deep-neural-network learning accelerator with fine-grained mixed precision of FP8–FP16 J Lee, J Lee, D Han, J Lee, G Park, HJ Yoo IEEE Solid-State Circuits Letters 2 (11), 232-235, 2019 | 20 | 2019 |
| An overview of sparsity exploitation in CNNs for on-device intelligence with software-hardware cross-layer optimizations S Kang, G Park, S Kim, S Kim, D Han, HJ Yoo IEEE Journal on Emerging and Selected Topics in Circuits and Systems 11 (4 …, 2021 | 16 | 2021 |
| A 1.15 TOPS/W energy-efficient capsule network accelerator for real-time 3D point cloud segmentation in mobile environment G Park, D Im, D Han, HJ Yoo IEEE Transactions on Circuits and Systems II: Express Briefs 67 (9), 1594-1598, 2020 | 13 | 2020 |
| DSPU: A 281.6 mW real-time depth signal processing unit for deep learning-based dense RGB-D data acquisition with depth fusion and 3D bounding box extraction in mobile platforms D Im, G Park, Z Li, J Ryu, S Kang, D Han, J Lee, HJ Yoo 2022 IEEE International Solid-State Circuits Conference (ISSCC) 65, 510-512, 2022 | 11 | 2022 |
| Sibia: Signed bit-slice architecture for dense dnn acceleration with slice-level sparsity exploitation D Im, G Park, Z Li, J Ryu, HJ Yoo 2023 IEEE International Symposium on High-Performance Computer Architecture …, 2023 | 6 | 2023 |
| A 0.95 mJ/frame DNN training processor for robust object detection with real-world environmental adaptation D Han, D Im, G Park, Y Kim, S Song, J Lee, HJ Yoo 2022 IEEE 4th International Conference on Artificial Intelligence Circuits …, 2022 | 6* | 2022 |
| DSPU: An Efficient Deep Learning-Based Dense RGB-D Data Acquisition With Sensor Fusion and 3-D Perception SoC D Im, G Park, J Ryu, Z Li, S Kang, D Han, J Lee, W Park, H Kwon, HJ Yoo IEEE Journal of Solid-State Circuits 58 (1), 177-188, 2022 | 3 | 2022 |
| A 49.5 mW multi-scale linear quantized online learning processor for real-time adaptive object detection S Song, S Kim, G Park, D Han, HJ Yoo IEEE Transactions on Circuits and Systems II: Express Briefs 69 (5), 2443-2447, 2022 | 3 | 2022 |
| A dnn training processor for robust object detection with real-world environmental adaptation D Han, D Im, G Park, Y Kim, S Song, J Lee, HJ Yoo 2022 IEEE 4th International Conference on Artificial Intelligence Circuits …, 2022 | 2 | 2022 |
| A mobile DNN training processor with automatic bit precision search and fine-grained sparsity exploitation D Han, D Im, G Park, Y Kim, S Song, J Lee, HJ Yoo IEEE Micro 42 (2), 16-25, 2021 | 2 | 2021 |
| A 0.82 μW CIS-based action recognition SoC with self-adjustable frame resolution for always-on IoT devices J Ryu, G Park, D Im, JH Kim, HJ Yoo IEEE Transactions on Circuits and Systems II: Express Briefs 68 (5), 1700-1704, 2021 | 2 | 2021 |
| An 2.31 uJ/Inference Ultra-Low Power Always-On Event-Driven AI-IoT SoC With Switchable nvSRAM Compute-in-Memory Macro H Sang, W Xie, G Park, HJ Yoo IEEE Transactions on Circuits and Systems II: Express Briefs, 2024 | 1 | 2024 |
| 20.8 Space-Mate: A 303.5 mW Real-Time Sparse Mixture-of-Experts-Based NeRF-SLAM Processor for Mobile Spatial Computing G Park, S Song, H Sang, D Im, D Han, S Kim, H Lee, HJ Yoo 2024 IEEE International Solid-State Circuits Conference (ISSCC) 67, 374-376, 2024 | 1 | 2024 |
| A 33.6 FPS Embedding based Real-time Neural Rendering Accelerator with Switchable Computation Skipping Architecture on Edge Device J Park, D Han, J Ryu, D Im, G Park, H Yoo 2023 IEEE Asian Solid-State Circuits Conference (A-SSCC), 1-3, 2023 | 1 | 2023 |
| GPPU: A 330.4-μJ/task Neural Path Planning Processor with Hybrid GNN Acceleration for Autonomous 3D Navigation S Song, D Han, S Kim, S Kim, G Park, HJ Yoo 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and …, 2023 | 1 | 2023 |
| An Artificial-Intelligence-based SLAM Processor with Scene-adaptive Sampling and Hybrid NeRF Model Training Acceleration G Park, S Song, H Sang, D Im, D Han, S Kim, H Lee, HJ Yoo IEEE Transactions on Circuits and Systems for Artificial Intelligence, 2024 | | 2024 |
| NeRF-Navi: A 93.6-202.9 µJ/task Switchable Approximate-Accurate NeRF Path Planning Processor with Dual Attention Engine and Outlier Bit-Offloading Core S Kim, S Song, W Park, J Ryu, S Kim, G Park, S Kim, HJ Yoo 2024 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and …, 2024 | | 2024 |
| A Low-power and Real-time Neural-Rendering Dense SLAM Processor with 3-Level Hierarchical Sparsity Exploitation G Park, S Song, H Sang, D Im, D Han, S Kim, H Lee, HJ Yoo 2024 IEEE Symposium in Low-Power and High-Speed Chips (COOL CHIPS), 1-3, 2024 | | 2024 |
