A monolithically integrated single-input load-modulated balanced amplifier with enhanced efficiency at power back-off L Chen, H Liu, J Hora, JA Zhang, KS Yeo, X Zhu IEEE Journal of Solid-State Circuits 56 (5), 1553-1564, 2021 | 28 | 2021 |
Very low bandgap voltage reference with high PSRR enhancement stage implemented in 90nm CMOS process technology for LDO application KR Francisco, JA Hora 2012 IEEE International Conference on Electronics Design, Systems and …, 2012 | 21 | 2012 |
Optimization of physically-aware synthesis for digital implementation flow LE Geralla, MJ Guzman, JA Hora International Journal of Engineering & Technology 7 (2.11), 31-34, 2018 | 11 | 2018 |
Interconnect modeling of global metals for 40nm node MRF Abingosa, C Receno, J Imperial, JA Hora 2015 International Conference on Humanoid, Nanotechnology, Information …, 2015 | 10 | 2015 |
Enhanced RF to DC converter with LC resonant circuit LJ Gabrillo, MG Galesand, JA Hora IOP conference series: materials science and engineering 79 (1), 012011, 2015 | 10 | 2015 |
Asynchronous dual-mode buck converter design with protection circuits in 0.13 µm CMOS process for battery applications JA Hora, JC Zeng, WR Liou 2009 IEEE 8th International Conference on ASIC, 1314-1317, 2009 | 9 | 2009 |
Design Implementation of 10T Static Random Access Memory Cell Using Stacked Transistors for Power Dissipation Reduction JM Maute, VKJ Puebla, RT Nericua, OJL Gerasta, JA Hora 2018 IEEE 10th International Conference on Humanoid, Nanotechnology …, 2019 | 8 | 2019 |
Simplified over-temperature protection circuit structure for WSN/IoT device power management JA Hora, X Zhu, E Dutkiewicz 2019 13th International Conference on Sensing Technology (ICST), 1-4, 2019 | 7 | 2019 |
Self-biased 2.4 GHz CMOS RF-to-DC converter with 80% efficiency and− 22.04 dBm sensitivity for Wi-Fi energy harvesting KJP Jimenez, JA Hora, OJL Gerasta, X Zhu, E Dutkiewicz 2019 IEEE International Circuits and Systems Symposium (ICSyS), 1-4, 2019 | 7 | 2019 |
High efficiency asynchronous pwm boost converter in 90nm cmos technology for constant current led driver JA Hora, MT Hamak, AKA Suizo TENCON 2012 IEEE Region 10 Conference, 1-5, 2012 | 6 | 2012 |
High stability adaptive ldo using dynamic load sensing for low power management of wireless sensor networks TL Vergara, JA Hora 2020 IEEE International Conference on Power Electronics, Drives and Energy …, 2020 | 5 | 2020 |
CMOS Modified Differential Voltage Multiplier Co-integrated with Indoor Photovoltaic Energy Harvesting in 65nm CMOS Process for WSN Application RACO Calimpusan, JA Hora, AC Lowaton 2019 IEEE 11th International Conference on Humanoid, Nanotechnology …, 2020 | 5 | 2020 |
PV-TEG-WiFi multiple sources design energy harvesting system for WSN application RVP Acut, JA Hora, OJL Gerasta, X Zhu, E Dutkiewicz 2019 IEEE International Circuits and Systems Symposium (ICSyS), 1-5, 2019 | 5 | 2019 |
Design of buck converter with dead-time control and automatic power-down system for WSN application JA Hora, AC Arellano, X Zhu, E Dutkiewicz 2019 IEEE Wireless Power Transfer Conference (WPTC), 582-586, 2019 | 5 | 2019 |
Design Methodology of a Voltage Bandgap Reference with High PSRR in Advanced Technology Nodes for LDO Application RLM Bagundol, JA Hora, EL Oling 2022 IEEE 14th International Conference on Humanoid, Nanotechnology …, 2022 | 4 | 2022 |
Low input voltage charge pump for thermoelectric energy harvesting applications in 65nm CMOS technology J Hora, AZ Recamadas, RJ Silvosa TENCON 2022-2022 IEEE Region 10 Conference (TENCON), 1-5, 2022 | 4 | 2022 |
Design of single poly flash memory cell with power reduction technique at program mode in 65nm CMOS process CJ Sagario, B Quidlat, KG Jimenez, IB Escabal, AC Lowaton, JA Hora 2018 International Conference on Control, Electronics, Renewable Energy and …, 2018 | 4 | 2018 |
Design of Low Power P-Gated Schmitt Trigger SRAM in 65nm CMOS Technology DP Madelo, A Tayros, R Sabarillo, A Lowaton, J Hora 2018 International Conference on Control, Electronics, Renewable Energy and …, 2018 | 4 | 2018 |
Analysis on HSpice performance trade-off versus simulation time MA Capilayan, R Minguez, JA Hora 2015 International Conference on Humanoid, Nanotechnology, Information …, 2015 | 4 | 2015 |
Design of RF to DC converter in 90nm CMOS technology for ultra-low power application JA Hora, NM Mapula, ED Talagon, MB Bate, RS Berido, GFP Palencia 2015 International Conference on Humanoid, Nanotechnology, Information …, 2015 | 4 | 2015 |