| Design and implementation of low complexity circularly symmetric 2D FIR filter architectures VK Odugu, C Venkata Narasimhulu, K Satya Prasad Multidimensional Systems and Signal Processing 31, 1385-1410, 2020 | 19 | 2020 |
| An efficient VLSI architecture of 2‐D finite impulse response filter using enhanced approximate compressor circuits VK Odugu, SP K International Journal of Circuit Theory and Applications 49 (11), 3653-3668, 2021 | 15 | 2021 |
| Implementation of low power and memory efficient 2D FIR filter architecture VK Odugu, CV Narasimhulu, KS Prasad International Journal of Recent Technology and Engineering 8 (1), 927-935, 2019 | 8 | 2019 |
| A novel filter-bank architecture of 2D-FIR symmetry filters using LUT based multipliers VK Odugu, CV Narasimhulu, KS Prasad Integration 84, 12-25, 2022 | 7 | 2022 |
| Implementation of Low Power Generic 2D FIR Filter Bank Architecture Using Memory-based Multipliers. VK Odugu, CV Narasimhulu, KS Prasad J. Mobile Multimedia 18 (3), 583-602, 2022 | 7 | 2022 |
| Efficient VLSI architectures for FIR filters OV Krishna, CV Narasimhulu, KS Prasad IOSR Journal of VLSI and Signal Processing. 6 (6), 37-44, 2016 | 3 | 2016 |
| Evaluation of image inpainting algorithms BJ Rao, OV Krishna CVR Journal of Science and Technology 7, 48-52, 2014 | 3 | 2014 |
| A continuous-time ADC and Digital Signal Processing System for Smart Dust and wireless sensor applications BJ Rao, OV Krishna CVR Journal of Science and Technology 4, 24-32, 2013 | 3 | 2013 |
| Design and Implementation of Instrumentation Amplifier for EEG in 180nm CMOS technology OV Krishna, BJ Rao CVR Journal of Science and Technology 8, 57-64, 2015 | 2 | 2015 |
| The Log Polar Transformation for Rotation Invariant Image Registration of Aerial Images BJ Rao, OV Krishna International Journal of Computer Technology and Applications 4 (5), 833, 2013 | 2 | 2013 |
| Implementation of block-based diagonal and quadrantal symmetry type 2D-FIR filter architectures using DA technique VS Reddy, AV Juliet, ER Thuraka, VK Odugu Computers and Electrical Engineering 118, 109301, 2024 | 1 | 2024 |
| Development and performance evaluation of enhanced image dehazing method using deep learning networks GH Babu, VK Odugu, N Venkatram, B Satish, K Revathi, BJ Rao Journal of Visual Communication and Image Representation 97, 103976, 2023 | 1 | 2023 |
| Design and Implementation of FIR Filter using Low Power and High Speed Multiplier and Adders OV Krishna CVR Journal of Science and Technology 17 (1), 127-131, 2019 | 1 | 2019 |
| Design and Implementation of FIR Filter using Low Power and High-Speed Multiplier and Adders OV Krishna CVR Journal of Science and Technology 15, 80-84, 2018 | 1 | 2018 |
| Automatic Cheque Clearance System using MATLAB BJ Rao, OV Krishna CVR Journal of Science and Technology 10, 54-58, 2016 | 1 | 2016 |
| Design and Implementation of Block Based Transpose Form FIR Filter OV Krishna, C VenkataNarasimhulu, KS Prasad IJCA, 0 | 1 | |
| Higher order and optimized symmetric 2D FIR filter design and hardware architecture implementation using CSD-CSE VK Odugu, HB Gade, AR Uppala Computers and Electrical Engineering 119, 109564, 2024 | | 2024 |
| Area-Delay-Power Efficient VLSI Architecture 2D FIR Filter using Modified Multipliers and Adders VK Odugu, BJ Rao, GH Babu CVR Journal of Science and Technology 26 (1), 47-53, 2024 | | 2024 |
| Design and implementation of power and area efficient architectures of circular symmetry 2-D FIR filters using CSOA-based CSD V Srilatha Reddy, A Vimala Juliet, ER Thuraka, VK Odugu Multidimensional Systems and Signal Processing, 1-27, 2024 | | 2024 |
| Optimized recurrent neural network based brain emotion recognition technique GRK Reddy, AD Bhavani, VK Odugu Multimedia Tools and Applications, 1-20, 2024 | | 2024 |
Dr. B Janardhana RaoAssoc. Professor of ECE, CVR College of Engineering, Hyderabad在 cvr.ac.in 的电子邮件经过验证
