| Self-learning RF receiver systems: Process aware real-time adaptation to channel conditions for low power operation D Banerjee, B Muldrey, X Wang, S Sen, A Chatterjee IEEE Transactions on Circuits and Systems I: Regular Papers 64 (1), 195-207, 2016 | 34 | 2016 |
| Design of a low-overhead random number generator using cmos-based cascaded chaotic maps PS Paul, M Sadia, MR Hossain, B Muldrey, MS Hasan Proceedings of the 2021 on Great Lakes Symposium on VLSI, 109-114, 2021 | 17 | 2021 |
| Targeting hardware Trojans in mixed-signal circuits for security S Deyati, BJ Muldrey, A Chatterjee 2016 IEEE 21st International Mixed-Signal Testing Workshop (IMSTW), 1-4, 2016 | 15 | 2016 |
| Low cost sparse multiband signal characterization using asynchronous multi-rate sampling: Algorithms and hardware N Tzou, D Bhatta, BJ Muldrey, T Moon, X Wang, H Choi, A Chatterjee Journal of Electronic Testing 31, 85-98, 2015 | 15 | 2015 |
| Cascading CMOS-based chaotic maps for improved performance and its application in efficient RNG design PS Paul, M Sadia, MR Hossain, B Muldrey, MS Hasan IEEE Access 10, 33758-33770, 2022 | 14 | 2022 |
| Adaptive testing of analog/RF circuits using hardware extracted FSM models S Deyati, BJ Muldrey, A Chatterjee 2016 IEEE 34th VLSI Test Symposium (VTS), 1-6, 2016 | 14 | 2016 |
| Analog push pull amplifier-based physically unclonable function for hardware security S Deyati, A Chatterjee, BJ Muldrey US Patent 10,211,993, 2019 | 13 | 2019 |
| Self-learning MIMO-RF receiver systems: Process resilient real-time adaptation to channel conditions for low power operation D Banerjee, B Muldrey, S Sen, X Wang, A Chatterjee 2014 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 710-717, 2014 | 13 | 2014 |
| Clustering using multilayer perceptrons D Charalampidis, B Muldrey Nonlinear Analysis: Theory, Methods & Applications 71 (12), e2807-e2813, 2009 | 13 | 2009 |
| High resolution pulse propagation driven Trojan detection in digital logic: optimization algorithms and infrastructure S Deyati, BJ Muldrey, A Singh, A Chatterjee 2014 IEEE 23rd Asian Test Symposium, 200-205, 2014 | 11 | 2014 |
| Validation signature testing: A methodology for post-silicon validation of analog/mixed-signal circuits A Chatterjee, S Deyati, B Muldrey, S Devarakond, A Banerjee Proceedings of the International Conference on Computer-Aided Design, 553-556, 2012 | 11 | 2012 |
| Challenge engineering and design of analog push pull amplifier based physically unclonable function for hardware security S Deyati, BJ Muldrey, AD Singh, A Chatterjee 2015 IEEE 24th Asian test symposium (ATS), 127-132, 2015 | 10 | 2015 |
| Atomic model learning: A machine learning paradigm for post silicon debug of RF/analog circuits S Deyati, BJ Muldrey, A Banerjee, A Chatterjee 2014 IEEE 32nd VLSI Test Symposium (VTS), 1-6, 2014 | 10 | 2014 |
| RAVAGE: Post-silicon validation of mixed signal systems using genetic stimulus evolution and model tuning B Muldrey, S Deyati, M Giardino, A Chatterjee 2013 IEEE 31st VLSI Test Symposium (VTS), 1-6, 2013 | 10 | 2013 |
| Vast: Post-silicon validation and diagnosis of rf/mixed-signal circuits using signature tests S Deyati, A Banerjee, BJ Muldrey, A Chatterjee 2013 26th International Conference on VLSI Design and 2013 12th …, 2013 | 10 | 2013 |
| Self-parameterized chaotic map: A hardware-efficient scheme providing wide chaotic range PS Paul, A Dhungel, M Sadia, MR Hossain, B Muldrey, MS Hasan 2021 28th IEEE International Conference on Electronics, Circuits, and …, 2021 | 9 | 2021 |
| Design of efficient analog physically unclonable functions using alternative test principles S Deyati, B Muldrey, A Singh, A Chatterjee 2017 International Mixed Signals Testing Workshop (IMSTW), 1-4, 2017 | 9 | 2017 |
| Robust chaos with novel 4-transistor maps M Sadia, PS Paul, MR Hossain, B Muldrey, MS Hasan IEEE Transactions on Circuits and Systems II: Express Briefs 70 (3), 914-918, 2022 | 8 | 2022 |
| A CMOS programmable analog standard cell library in Skywater 130nm open-source process J Hasler, B Muldrey, P Hardy Proceedings of the Workshop on Open-Source EDA Technology, WOSET, Virtual 4, 2021 | 7 | 2021 |
| Concurrent built in test and tuning of beamforming mimo systems using learning assisted performance optimization S Deyati, BJ Muldrey, B Jung, A Chatterjee 2017 IEEE International Test Conference (ITC), 1-10, 2017 | 7 | 2017 |
Sabyasachi DeyatiTest R&D Engineer@Intel在 gatech.edu 的电子邮件经过验证
