| An application-aware cache replacement policy for last-level caches TS Warrier, B Anupama, M Mutyam Architecture of Computing Systems–ARCS 2013: 26th International Conference …, 2013 | 18 | 2013 |
| Way sharing set associative cache architecture CJ Janraj, TV Kalyan, T Warrier, M Mutyam 2012 25th International Conference on VLSI Design, 251-256, 2012 | 14 | 2012 |
| Optimizing free layer of magnetic tunnel junction for true random number generator PB Alisha, TS Warrier Memories-Materials, Devices, Circuits and Systems 5, 100075, 2023 | 9 | 2023 |
| Evaluation of bit manipulation instructions in optimization of size and speed in RISC-V PS Babu, S Sivaraman, DN Sarma, TS Warrier 2021 34th International Conference on VLSI Design and 2021 20th …, 2021 | 5 | 2021 |
| 2L-2D routing for buffered mesh network-on-chip RG Kunthara, K Neethu, RK James, SZ Sleeba, TS Warrier, J Jose VLSI Design and Test: 23rd International Symposium, VDAT 2019, Indore, India …, 2019 | 5 | 2019 |
| SkipCache: application aware cache management for chip multi‐processors TS Warrier, K Raghavendra, M Mutyam IET Computers & Digital Techniques 9 (6), 293-299, 2015 | 4 | 2015 |
| SkipCache: Miss-rate aware cache management K Raghavendra, TS Warrier, M Mutyam 2012 21st International Conference on Parallel Architectures and Compilation …, 2012 | 4 | 2012 |
| True Random Number Generator based on Voltage-Gated Spintronic structure PB Alisha, TS Warrier 2023 36th International Conference on VLSI Design and 2023 22nd …, 2023 | 2 | 2023 |
| ‘ACR: Application aware cache replacement for shared caches in multi-core systems TS Warrier Int. J. Comput. Eng. Technol 10 (2), 1-3, 2019 | 1 | 2019 |
| High-Performance Multi-level Cell Design Using Reduced Retention Time Spintronics Device PB Alisha, TS Warrier | | 2024 |
| TiCoSb Heusler alloy-based magnetic tunnel junction for efficient computing in memory architecture PB Alisha, TS Warrier Journal of Computational Electronics, 1-13, 2024 | | 2024 |
| Accelerating Cryptographic Algorithms on RISC-V cores using Carryless Multiplication S Sukumaran, TS Warrier, PS Babu, N Gala WiPiEC Journal-Works in Progress in Embedded Computing Journal 10 (2), 2024 | | 2024 |
| SAMO: store aware memory optimizations K Raghavendra, T Warrier, M Mutyam Proceedings of the 11th ACM Conference on Computing Frontiers, 1-10, 2014 | | 2014 |
| 2L-2D Routing for Buffered Mesh Network-on-Chip RK James, SZ Sleeba, TS Warrier, J Jose | | |
