| A review of engineering techniques to suppress ambipolarity in tunnel FET KR Pasupathy, TS Manivannan, G Lakshminarayanan Silicon 14 (5), 1887-1894, 2021 | 21 | 2021 |
| A 4-READ 2-WRITE multi-port register file design using pulsed-latches TS Manivannan, M Srinivasan 2018 Second International Conference on Electronics, Communication and …, 2018 | 4 | 2018 |
| Ambipolar current suppression in drain elevated TFET using a novel extended drain structure with a moderate doping profile TS Manivannan, KR Pasupathy, G Lakshminarayanan Microelectronics Journal 151, 106302, 2024 | | 2024 |
| Optimization of DE-QG TFET using novel CIP and DCT techniques TS Manivannan, KR Pasupathy, MRU Shaikh, G Lakshminarayanan Microelectronics Journal 144, 106097, 2024 | | 2024 |
| A Novel Design Approach to Implement Multi-port Register Files Using Pulsed-Latches TS Manivannan, M Srinivasan VLSI Design and Test: 22nd International Symposium, VDAT 2018, Madurai …, 2019 | | 2019 |
Lakshminarayanan GProfessor, National Institute of Technology在 nitt.edu 的电子邮件经过验证
