| A Type-I Sub-Sampling PLL With a Footprint and− 255-dB FOM A Sharkia, S Mirabbasi, S Shekhar IEEE Journal of Solid-State Circuits 53 (12), 2018 | 52 | 2018 |
| Silicon-Photonics Microring Links for Datacenters—Challenges and Opportunities AH Ahmed, A Sharkia, B Casper, S Mirabbasi, S Shekhar IEEE Journal of Selected Topics in Quantum Electronics 22 (6), 194-203, 2016 | 46 | 2016 |
| A 0.01mm2 4.6-to-5.6GHz sub-sampling type-I frequency synthesizer with −254dB FOM A Sharkia, S Mirabbasi, S Shekhar 2018 IEEE International Solid State Circuits Conference - (ISSCC), 256-258, 2018 | 29 | 2018 |
| A Compact, Voltage-Mode Type-I PLL With Gain-Boosted Saturated PFD and Synchronous Peak Tracking Loop Filter A Sharkia, S Aniruddhan, S Mirabbasi, S Shekhar IEEE Transactions on Circuits and Systems I: Regular Papers, 2019 | 23 | 2019 |
| A 10-Gb/s -18.8 dBm Sensitivity 5.7 mW Fully-Integrated Optoelectronic Receiver With Avalanche Photodetector in 0.13-μm CMOS S Nayak, AH Ahmed, A Sharkia, AS Ramani, S Mirabbasi, S Shekhar IEEE Transactions on Circuits and Systems I: Regular Papers, 2019 | 19 | 2019 |
| A Hierarchical Self-Interference Canceller for Full-Duplex LPWAN Applications Achieving 52–70-dB RF Cancellation H Abolmagd, R Subbaraman, O Esmaeeli, Y Guntupalli, A Sharkia, ... IEEE Journal of Solid-State Circuits, 2022 | 11 | 2022 |
| A high-performance, yet simple to design, digital-friendly type-I PLL A Sharkia, S Aniruddhan, S Shekhar, S Mirabbasi 2015 IEEE Custom Integrated Circuits Conference (CICC), 1-4, 2015 | 6 | 2015 |
| On the design of type-I integer-N phase-locked loops A Sharkia University of British Columbia, 2015 | 2 | 2015 |
| High sensitivity accelerometer operating on the border of stability with digital sliding mode control EH Sarraf, A Sharkia, S Moori, M Sharma, E Cretu SENSORS, 2013 IEEE, 1-4, 2013 | 2 | 2013 |
| A Serrodyne Modulator-Based Fractional Frequency Synthesis Technique for Low-Noise, GHz-Rate Clocking A Sharkia, S Mirabbasi, S Shekhar IEEE Journal of Solid-State Circuits, 2023 | 1 | 2023 |
| Clock synthesis, distribution, and modulation techniques A Sharkia, S Shekhar, S Mirabbasi US Patent App. 17/800,876, 2023 | | 2023 |
| Efficient frequency synthesis using subsampling and serrodyne techniques A Sharkia University of British Columbia, 2021 | | 2021 |
Sudip ShekharProfessor of Electrical & Computer Engineering, University of British Columbia在 ece.ubc.ca 的电子邮件经过验证
